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<a href="#define-members">Macros</a> &#124;
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Macros</h2></td></tr>
<tr class="memitem:ga7221416427c693436f444f4bf2d343ac"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga7221416427c693436f444f4bf2d343ac">XZDMA_HW_H_</a></td></tr>
<tr class="memdesc:ga7221416427c693436f444f4bf2d343ac"><td class="mdescLeft">&#160;</td><td class="mdescRight">Prevent circular inclusions by using protection macros.  <a href="#ga7221416427c693436f444f4bf2d343ac">More...</a><br/></td></tr>
<tr class="separator:ga7221416427c693436f444f4bf2d343ac"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3218611d01dec526018a6bd63dce603c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga3218611d01dec526018a6bd63dce603c">XZDma_In32</a>&#160;&#160;&#160;Xil_In32</td></tr>
<tr class="memdesc:ga3218611d01dec526018a6bd63dce603c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Input operation.  <a href="#ga3218611d01dec526018a6bd63dce603c">More...</a><br/></td></tr>
<tr class="separator:ga3218611d01dec526018a6bd63dce603c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga35a6987a4645af9cf6fc7463ca90f855"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga35a6987a4645af9cf6fc7463ca90f855">XZDma_Out32</a>&#160;&#160;&#160;Xil_Out32</td></tr>
<tr class="memdesc:ga35a6987a4645af9cf6fc7463ca90f855"><td class="mdescLeft">&#160;</td><td class="mdescRight">Output operation.  <a href="#ga35a6987a4645af9cf6fc7463ca90f855">More...</a><br/></td></tr>
<tr class="separator:ga35a6987a4645af9cf6fc7463ca90f855"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf3bdd7a21f9d6add3ec23802122a7a85"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gaf3bdd7a21f9d6add3ec23802122a7a85">XZDma_ReadReg</a>(BaseAddress, RegOffset)&#160;&#160;&#160;<a class="el" href="group__zdma.html#ga3218611d01dec526018a6bd63dce603c">XZDma_In32</a>((BaseAddress) + (u32)(RegOffset))</td></tr>
<tr class="memdesc:gaf3bdd7a21f9d6add3ec23802122a7a85"><td class="mdescLeft">&#160;</td><td class="mdescRight">This macro reads the given register.  <a href="#gaf3bdd7a21f9d6add3ec23802122a7a85">More...</a><br/></td></tr>
<tr class="separator:gaf3bdd7a21f9d6add3ec23802122a7a85"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1fe52ea6cc149bd35296d497837eff5b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga1fe52ea6cc149bd35296d497837eff5b">XZDma_WriteReg</a>(BaseAddress, RegOffset, Data)&#160;&#160;&#160;<a class="el" href="group__zdma.html#ga35a6987a4645af9cf6fc7463ca90f855">XZDma_Out32</a>(((BaseAddress) + (u32)(RegOffset)), (u32)(Data))</td></tr>
<tr class="memdesc:ga1fe52ea6cc149bd35296d497837eff5b"><td class="mdescLeft">&#160;</td><td class="mdescRight">This macro writes the value into the given register.  <a href="#ga1fe52ea6cc149bd35296d497837eff5b">More...</a><br/></td></tr>
<tr class="separator:ga1fe52ea6cc149bd35296d497837eff5b"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Enumerations</h2></td></tr>
<tr class="memitem:ga37a3c751884020089469a54e242ff4cd"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga37a3c751884020089469a54e242ff4cd">XZDma_Handler</a> { <a class="el" href="group__zdma.html#gga37a3c751884020089469a54e242ff4cdaaffcfeb2b42f83e2654e1d58d609f0ab">XZDMA_HANDLER_DONE</a>, 
<a class="el" href="group__zdma.html#gga37a3c751884020089469a54e242ff4cdafc560c87ab5657b331fb72c38c1ad83c">XZDMA_HANDLER_ERROR</a>
 }</td></tr>
<tr class="memdesc:ga37a3c751884020089469a54e242ff4cd"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef contains ZDMA Handler Types.  <a href="group__zdma.html#ga37a3c751884020089469a54e242ff4cd">More...</a><br/></td></tr>
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Functions</h2></td></tr>
<tr class="memitem:gad882e6d7430871e5b71643c8be2512d5"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gad882e6d7430871e5b71643c8be2512d5">XZDma_CfgInitialize</a> (<a class="el" href="struct_x_z_dma.html">XZDma</a> *InstancePtr, <a class="el" href="struct_x_z_dma___config.html">XZDma_Config</a> *CfgPtr, u32 EffectiveAddr)</td></tr>
<tr class="memdesc:gad882e6d7430871e5b71643c8be2512d5"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function initializes an ZDMA core.  <a href="#gad882e6d7430871e5b71643c8be2512d5">More...</a><br/></td></tr>
<tr class="separator:gad882e6d7430871e5b71643c8be2512d5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf1772f190fe0a67a17c78f5f23fc8024"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gaf1772f190fe0a67a17c78f5f23fc8024">XZDma_SetMode</a> (<a class="el" href="struct_x_z_dma.html">XZDma</a> *InstancePtr, u8 IsSgDma, <a class="el" href="xzdma_8h.html#a84e5ba98d56dac2078e4bc68d5b5ab92">XZDma_Mode</a> Mode)</td></tr>
<tr class="memdesc:gaf1772f190fe0a67a17c78f5f23fc8024"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the pointer type and mode in which ZDMA needs to transfer the data.  <a href="#gaf1772f190fe0a67a17c78f5f23fc8024">More...</a><br/></td></tr>
<tr class="separator:gaf1772f190fe0a67a17c78f5f23fc8024"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4f701b228ebc77f96faaba09cd9c63db"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga4f701b228ebc77f96faaba09cd9c63db">XZDma_CreateBDList</a> (<a class="el" href="struct_x_z_dma.html">XZDma</a> *InstancePtr, <a class="el" href="xzdma_8h.html#a8deecd1bc1f130b591748afb1790a013">XZDma_DscrType</a> TypeOfDscr, UINTPTR Dscr_MemPtr, u32 NoOfBytes)</td></tr>
<tr class="memdesc:ga4f701b228ebc77f96faaba09cd9c63db"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the descriptor type and descriptor pointer's start address of both source and destination based on the memory allocated by user and also calculates no of descriptors(BDs) can be created in the allocated memory.  <a href="#ga4f701b228ebc77f96faaba09cd9c63db">More...</a><br/></td></tr>
<tr class="separator:ga4f701b228ebc77f96faaba09cd9c63db"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9f83e94a6ecae10b6bff851d76ffef24"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga9f83e94a6ecae10b6bff851d76ffef24">XZDma_SetChDataConfig</a> (<a class="el" href="struct_x_z_dma.html">XZDma</a> *InstancePtr, <a class="el" href="struct_x_z_dma___data_config.html">XZDma_DataConfig</a> *Configure)</td></tr>
<tr class="memdesc:ga9f83e94a6ecae10b6bff851d76ffef24"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the data attributes and control configurations of a ZDMA core based on the inputs provided.  <a href="#ga9f83e94a6ecae10b6bff851d76ffef24">More...</a><br/></td></tr>
<tr class="separator:ga9f83e94a6ecae10b6bff851d76ffef24"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacdca22a1e7cd74b3f2acbfec3f0509f4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gacdca22a1e7cd74b3f2acbfec3f0509f4">XZDma_GetChDataConfig</a> (<a class="el" href="struct_x_z_dma.html">XZDma</a> *InstancePtr, <a class="el" href="struct_x_z_dma___data_config.html">XZDma_DataConfig</a> *Configure)</td></tr>
<tr class="memdesc:gacdca22a1e7cd74b3f2acbfec3f0509f4"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function gets the data attributes and control configurations of a ZDMA core.  <a href="#gacdca22a1e7cd74b3f2acbfec3f0509f4">More...</a><br/></td></tr>
<tr class="separator:gacdca22a1e7cd74b3f2acbfec3f0509f4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga860cde1482bc78429ea5c6f1d3da9014"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga860cde1482bc78429ea5c6f1d3da9014">XZDma_SetChDscrConfig</a> (<a class="el" href="struct_x_z_dma.html">XZDma</a> *InstancePtr, <a class="el" href="struct_x_z_dma___dscr_config.html">XZDma_DscrConfig</a> *Configure)</td></tr>
<tr class="memdesc:ga860cde1482bc78429ea5c6f1d3da9014"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the descriptor attributes based on the inputs provided in the structure.  <a href="#ga860cde1482bc78429ea5c6f1d3da9014">More...</a><br/></td></tr>
<tr class="separator:ga860cde1482bc78429ea5c6f1d3da9014"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga595ab84007b44249fe04571d18856158"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga595ab84007b44249fe04571d18856158">XZDma_GetChDscrConfig</a> (<a class="el" href="struct_x_z_dma.html">XZDma</a> *InstancePtr, <a class="el" href="struct_x_z_dma___dscr_config.html">XZDma_DscrConfig</a> *Configure)</td></tr>
<tr class="memdesc:ga595ab84007b44249fe04571d18856158"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function gets the descriptor attributes of the channel.  <a href="#ga595ab84007b44249fe04571d18856158">More...</a><br/></td></tr>
<tr class="separator:ga595ab84007b44249fe04571d18856158"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga15a0124d42f8ff48e54f32c1b643fe7b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga15a0124d42f8ff48e54f32c1b643fe7b">XZDma_WOData</a> (<a class="el" href="struct_x_z_dma.html">XZDma</a> *InstancePtr, u32 *Buffer)</td></tr>
<tr class="memdesc:ga15a0124d42f8ff48e54f32c1b643fe7b"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function preloads the buffers which will be used in write only mode.  <a href="#ga15a0124d42f8ff48e54f32c1b643fe7b">More...</a><br/></td></tr>
<tr class="separator:ga15a0124d42f8ff48e54f32c1b643fe7b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7cb39835692353e5c34d95938b8ce8d0"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga7cb39835692353e5c34d95938b8ce8d0">XZDma_Resume</a> (<a class="el" href="struct_x_z_dma.html">XZDma</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga7cb39835692353e5c34d95938b8ce8d0"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function resume the paused state of ZDMA core and starts the transfer from where it has paused.  <a href="#ga7cb39835692353e5c34d95938b8ce8d0">More...</a><br/></td></tr>
<tr class="separator:ga7cb39835692353e5c34d95938b8ce8d0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf236c2323636d87ab0888b2d6f55a313"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gaf236c2323636d87ab0888b2d6f55a313">XZDma_Reset</a> (<a class="el" href="struct_x_z_dma.html">XZDma</a> *InstancePtr)</td></tr>
<tr class="memdesc:gaf236c2323636d87ab0888b2d6f55a313"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function resets the ZDMA core.  <a href="#gaf236c2323636d87ab0888b2d6f55a313">More...</a><br/></td></tr>
<tr class="separator:gaf236c2323636d87ab0888b2d6f55a313"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabbb337d990f31dc8932356f5abeb78bf"><td class="memItemLeft" align="right" valign="top"><a class="el" href="xzdma_8h.html#a19f8494063d56f2f39f9d40e6ded952a">XZDmaState</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gabbb337d990f31dc8932356f5abeb78bf">XZDma_ChannelState</a> (<a class="el" href="struct_x_z_dma.html">XZDma</a> *InstancePtr)</td></tr>
<tr class="memdesc:gabbb337d990f31dc8932356f5abeb78bf"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function returns the state of ZDMA core.  <a href="#gabbb337d990f31dc8932356f5abeb78bf">More...</a><br/></td></tr>
<tr class="separator:gabbb337d990f31dc8932356f5abeb78bf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga70f7466e97aae2126181727774f6e6bb"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga70f7466e97aae2126181727774f6e6bb">XZDma_Start</a> (<a class="el" href="struct_x_z_dma.html">XZDma</a> *InstancePtr, <a class="el" href="struct_x_z_dma___transfer.html">XZDma_Transfer</a> *Data, u32 Num)</td></tr>
<tr class="memdesc:ga70f7466e97aae2126181727774f6e6bb"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets all the required fields for initiating data transfer.  <a href="#ga70f7466e97aae2126181727774f6e6bb">More...</a><br/></td></tr>
<tr class="separator:ga70f7466e97aae2126181727774f6e6bb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4e1c01839429d264c285bc7488b42fb8"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga4e1c01839429d264c285bc7488b42fb8">XZDma_ScatterGather</a> (<a class="el" href="struct_x_z_dma.html">XZDma</a> *InstancePtr, <a class="el" href="struct_x_z_dma___transfer.html">XZDma_Transfer</a> *Data, u32 Num)</td></tr>
<tr class="memdesc:ga4e1c01839429d264c285bc7488b42fb8"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets all the required fields for initiating data transfer in scatter gather mode.  <a href="#ga4e1c01839429d264c285bc7488b42fb8">More...</a><br/></td></tr>
<tr class="separator:ga4e1c01839429d264c285bc7488b42fb8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga34c98a505b24c6e549ed7f746a82676e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga34c98a505b24c6e549ed7f746a82676e">XZDma_Enable</a> (<a class="el" href="struct_x_z_dma.html">XZDma</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga34c98a505b24c6e549ed7f746a82676e"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function enables all the interrupts which user intended to enable and enables the ZDMA channel for initiating data transfer.  <a href="#ga34c98a505b24c6e549ed7f746a82676e">More...</a><br/></td></tr>
<tr class="separator:ga34c98a505b24c6e549ed7f746a82676e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa5012fbb827d2330cae8cb90cafb388c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gaa5012fbb827d2330cae8cb90cafb388c">XZDma_IntrHandler</a> (void *Instance)</td></tr>
<tr class="memdesc:gaa5012fbb827d2330cae8cb90cafb388c"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function is the interrupt handler for the ZDMA core.  <a href="#gaa5012fbb827d2330cae8cb90cafb388c">More...</a><br/></td></tr>
<tr class="separator:gaa5012fbb827d2330cae8cb90cafb388c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga78a9c500b9c87963f7695fc5edf87a21"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga78a9c500b9c87963f7695fc5edf87a21">XZDma_SetCallBack</a> (<a class="el" href="struct_x_z_dma.html">XZDma</a> *InstancePtr, <a class="el" href="group__zdma.html#ga37a3c751884020089469a54e242ff4cd">XZDma_Handler</a> HandlerType, void *CallBackFunc, void *CallBackRef)</td></tr>
<tr class="memdesc:ga78a9c500b9c87963f7695fc5edf87a21"><td class="mdescLeft">&#160;</td><td class="mdescRight">This routine installs an asynchronous callback function for the given HandlerType.  <a href="#ga78a9c500b9c87963f7695fc5edf87a21">More...</a><br/></td></tr>
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<tr class="memitem:ga166edb355a4395294e7910c68f4840ca"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga166edb355a4395294e7910c68f4840ca">XZDma_SelfTest</a> (<a class="el" href="struct_x_z_dma.html">XZDma</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga166edb355a4395294e7910c68f4840ca"><td class="mdescLeft">&#160;</td><td class="mdescRight">This file contains a diagnostic self-test function for the ZDMA driver.  <a href="#ga166edb355a4395294e7910c68f4840ca">More...</a><br/></td></tr>
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<tr class="memitem:ga1f24016eafb7226d1f8754082a24d95d"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_z_dma___config.html">XZDma_Config</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga1f24016eafb7226d1f8754082a24d95d">XZDma_LookupConfig</a> (u16 DeviceId)</td></tr>
<tr class="memdesc:ga1f24016eafb7226d1f8754082a24d95d"><td class="mdescLeft">&#160;</td><td class="mdescRight">XZDma_LookupConfig returns a reference to an <a class="el" href="struct_x_z_dma___config.html" title="This typedef contains configuration information for a ZDMA core Each ZDMA core should have a configur...">XZDma_Config</a> structure based on the unique device id, <em>DeviceId</em>.  <a href="#ga1f24016eafb7226d1f8754082a24d95d">More...</a><br/></td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Registers offsets</h2></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_ERR_CTRL</b>&#160;&#160;&#160;(0x000U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_ECO</b>&#160;&#160;&#160;(0x004U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_ISR_OFFSET</b>(InstancePtr)&#160;&#160;&#160;((InstancePtr)-&gt;irq_offset + (0x100U))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_IMR_OFFSET</b>(InstancePtr)&#160;&#160;&#160;((InstancePtr)-&gt;irq_offset + (0x104U))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_IEN_OFFSET</b>(InstancePtr)&#160;&#160;&#160;((InstancePtr)-&gt;irq_offset + (0x108U))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_IDS_OFFSET</b>(InstancePtr)&#160;&#160;&#160;((InstancePtr)-&gt;irq_offset + (0x10CU))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_CTRL0_OFFSET</b>&#160;&#160;&#160;(0x110U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_CTRL1_OFFSET</b>&#160;&#160;&#160;(0x114U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_PERIF_OFFSET</b>&#160;&#160;&#160;(0x118U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_STS_OFFSET</b>&#160;&#160;&#160;(0x11CU)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_DATA_ATTR_OFFSET</b>&#160;&#160;&#160;(0x120U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_DSCR_ATTR_OFFSET</b>&#160;&#160;&#160;(0x124U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_SRC_DSCR_WORD0_OFFSET</b>&#160;&#160;&#160;(0x128U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_SRC_DSCR_WORD1_OFFSET</b>&#160;&#160;&#160;(0x12CU)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_SRC_DSCR_WORD2_OFFSET</b>&#160;&#160;&#160;(0x130U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_SRC_DSCR_WORD3_OFFSET</b>&#160;&#160;&#160;(0x134U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_DST_DSCR_WORD0_OFFSET</b>&#160;&#160;&#160;(0x138U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_DST_DSCR_WORD1_OFFSET</b>&#160;&#160;&#160;(0x13CU)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_DST_DSCR_WORD2_OFFSET</b>&#160;&#160;&#160;(0x140U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_DST_DSCR_WORD3_OFFSET</b>&#160;&#160;&#160;(0x144U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_WR_ONLY_WORD0_OFFSET</b>&#160;&#160;&#160;(0x148U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_WR_ONLY_WORD1_OFFSET</b>&#160;&#160;&#160;(0x14CU)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_WR_ONLY_WORD2_OFFSET</b>&#160;&#160;&#160;(0x150U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_WR_ONLY_WORD3_OFFSET</b>&#160;&#160;&#160;(0x154U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_SRC_START_LSB_OFFSET</b>&#160;&#160;&#160;(0x158U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_SRC_START_MSB_OFFSET</b>&#160;&#160;&#160;(0x15CU)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_DST_START_LSB_OFFSET</b>&#160;&#160;&#160;(0x160U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_DST_START_MSB_OFFSET</b>&#160;&#160;&#160;(0x164U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_SRC_CUR_PYLD_LSB_OFFSET</b>&#160;&#160;&#160;(0x168U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_SRC_CUR_PYLD_MSB_OFFSET</b>&#160;&#160;&#160;(0x16CU)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_DST_CUR_PYLD_LSB_OFFSET</b>&#160;&#160;&#160;(0x170U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_DST_CUR_PYLD_MSB_OFFSET</b>&#160;&#160;&#160;(0x174U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_SRC_CUR_DSCR_LSB_OFFSET</b>&#160;&#160;&#160;(0x178U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_SRC_CUR_DSCR_MSB_OFFSET</b>&#160;&#160;&#160;(0x17CU)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_DST_CUR_DSCR_LSB_OFFSET</b>&#160;&#160;&#160;(0x180U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_DST_CUR_DSCR_MSB_OFFSET</b>&#160;&#160;&#160;(0x184U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_TOTAL_BYTE_OFFSET</b>&#160;&#160;&#160;(0x188U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_RATE_CNTL_OFFSET</b>&#160;&#160;&#160;(0x18CU)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_IRQ_SRC_ACCT_OFFSET</b>&#160;&#160;&#160;(0x190U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_IRQ_DST_ACCT_OFFSET</b>&#160;&#160;&#160;(0x194U)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_CH_CTRL2_OFFSET</b>&#160;&#160;&#160;(0x200U)</td></tr>
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IRQ Register offset for Versal 2VE and 2VM devices</h2></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XZDMA_IRQ_REG_OFFSET</b>&#160;&#160;&#160;(0x308U)</td></tr>
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Interrupt Enable/Disable/Mask/Status registers bit masks and shifts</h2></td></tr>
<tr class="memitem:ga749957c47c3d65c99861579af039b5db"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga749957c47c3d65c99861579af039b5db">XZDMA_IXR_DMA_PAUSE_MASK</a>&#160;&#160;&#160;(0x00000800U)</td></tr>
<tr class="memdesc:ga749957c47c3d65c99861579af039b5db"><td class="mdescLeft">&#160;</td><td class="mdescRight">IXR pause mask.  <a href="#ga749957c47c3d65c99861579af039b5db">More...</a><br/></td></tr>
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<tr class="memitem:ga3427b844ce3c78c2e203cbe632ce8d11"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga3427b844ce3c78c2e203cbe632ce8d11">XZDMA_IXR_DMA_DONE_MASK</a>&#160;&#160;&#160;(0x00000400U)</td></tr>
<tr class="memdesc:ga3427b844ce3c78c2e203cbe632ce8d11"><td class="mdescLeft">&#160;</td><td class="mdescRight">IXR done mask.  <a href="#ga3427b844ce3c78c2e203cbe632ce8d11">More...</a><br/></td></tr>
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<tr class="memitem:gaf54288858bd030f724d9939416975778"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gaf54288858bd030f724d9939416975778">XZDMA_IXR_AXI_WR_DATA_MASK</a>&#160;&#160;&#160;(0x00000200U)</td></tr>
<tr class="memdesc:gaf54288858bd030f724d9939416975778"><td class="mdescLeft">&#160;</td><td class="mdescRight">IXR AXI write data error mask.  <a href="#gaf54288858bd030f724d9939416975778">More...</a><br/></td></tr>
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<tr class="memitem:gae24332b4ced51e3a17de66e87f508e72"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gae24332b4ced51e3a17de66e87f508e72">XZDMA_IXR_AXI_RD_DATA_MASK</a>&#160;&#160;&#160;(0x00000100U)</td></tr>
<tr class="memdesc:gae24332b4ced51e3a17de66e87f508e72"><td class="mdescLeft">&#160;</td><td class="mdescRight">IXR AXI read data error mask.  <a href="#gae24332b4ced51e3a17de66e87f508e72">More...</a><br/></td></tr>
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<tr class="memitem:ga508df1ddb568661acbe7eb02addd91aa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga508df1ddb568661acbe7eb02addd91aa">XZDMA_IXR_AXI_RD_DST_DSCR_MASK</a>&#160;&#160;&#160;(0x00000080U)</td></tr>
<tr class="memdesc:ga508df1ddb568661acbe7eb02addd91aa"><td class="mdescLeft">&#160;</td><td class="mdescRight">IXR AXI read descriptor error mask.  <a href="#ga508df1ddb568661acbe7eb02addd91aa">More...</a><br/></td></tr>
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<tr class="memitem:gaa616129e7e1d450c57a45518c883a4b0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gaa616129e7e1d450c57a45518c883a4b0">XZDMA_IXR_AXI_RD_SRC_DSCR_MASK</a>&#160;&#160;&#160;(0x00000040U)</td></tr>
<tr class="memdesc:gaa616129e7e1d450c57a45518c883a4b0"><td class="mdescLeft">&#160;</td><td class="mdescRight">IXR AXI write descriptor error mask.  <a href="#gaa616129e7e1d450c57a45518c883a4b0">More...</a><br/></td></tr>
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<tr class="memitem:ga063a0a10898da8f3c94a0aa9fadba651"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga063a0a10898da8f3c94a0aa9fadba651">XZDMA_IXR_DST_ACCT_ERR_MASK</a>&#160;&#160;&#160;(0x00000020U)</td></tr>
<tr class="memdesc:ga063a0a10898da8f3c94a0aa9fadba651"><td class="mdescLeft">&#160;</td><td class="mdescRight">IXR DST interrupt count overflow mask.  <a href="#ga063a0a10898da8f3c94a0aa9fadba651">More...</a><br/></td></tr>
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<tr class="memitem:gaeeea1f0a82eac76cd1dc511109f98981"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gaeeea1f0a82eac76cd1dc511109f98981">XZDMA_IXR_SRC_ACCT_ERR_MASK</a>&#160;&#160;&#160;(0x00000010U)</td></tr>
<tr class="memdesc:gaeeea1f0a82eac76cd1dc511109f98981"><td class="mdescLeft">&#160;</td><td class="mdescRight">IXR SRC interrupt count overflow mask.  <a href="#gaeeea1f0a82eac76cd1dc511109f98981">More...</a><br/></td></tr>
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<tr class="memitem:gadc7f60924f5a890f36512209d386bbc4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gadc7f60924f5a890f36512209d386bbc4">XZDMA_IXR_BYTE_CNT_OVRFL_MASK</a>&#160;&#160;&#160;(0x00000008U)</td></tr>
<tr class="memdesc:gadc7f60924f5a890f36512209d386bbc4"><td class="mdescLeft">&#160;</td><td class="mdescRight">IXR byte count over flow mask.  <a href="#gadc7f60924f5a890f36512209d386bbc4">More...</a><br/></td></tr>
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<tr class="memitem:ga3dd41eac3fa26888a9aa221b7b595c86"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga3dd41eac3fa26888a9aa221b7b595c86">XZDMA_IXR_DST_DSCR_DONE_MASK</a>&#160;&#160;&#160;(0x00000004U)</td></tr>
<tr class="memdesc:ga3dd41eac3fa26888a9aa221b7b595c86"><td class="mdescLeft">&#160;</td><td class="mdescRight">IXR destination descriptor done mask.  <a href="#ga3dd41eac3fa26888a9aa221b7b595c86">More...</a><br/></td></tr>
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<tr class="memitem:ga7c2d94ea3ac539c290ef339a08e92e39"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga7c2d94ea3ac539c290ef339a08e92e39">XZDMA_IXR_SRC_DSCR_DONE_MASK</a>&#160;&#160;&#160;(0x00000002U)</td></tr>
<tr class="memdesc:ga7c2d94ea3ac539c290ef339a08e92e39"><td class="mdescLeft">&#160;</td><td class="mdescRight">IXR source descriptor done mask.  <a href="#ga7c2d94ea3ac539c290ef339a08e92e39">More...</a><br/></td></tr>
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<tr class="memitem:ga1d088945acbf596b4b967fd8d88475db"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga1d088945acbf596b4b967fd8d88475db">XZDMA_IXR_INV_APB_MASK</a>&#160;&#160;&#160;(0x00000001U)</td></tr>
<tr class="memdesc:ga1d088945acbf596b4b967fd8d88475db"><td class="mdescLeft">&#160;</td><td class="mdescRight">IXR invalid APB access mask.  <a href="#ga1d088945acbf596b4b967fd8d88475db">More...</a><br/></td></tr>
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<tr class="memitem:gad82b072a8c2cc4c5e32fc43e9822e634"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gad82b072a8c2cc4c5e32fc43e9822e634">XZDMA_IXR_ALL_INTR_MASK</a>&#160;&#160;&#160;(0x00000FFFU)</td></tr>
<tr class="memdesc:gad82b072a8c2cc4c5e32fc43e9822e634"><td class="mdescLeft">&#160;</td><td class="mdescRight">IXR OR of all the interrupts mask.  <a href="#gad82b072a8c2cc4c5e32fc43e9822e634">More...</a><br/></td></tr>
<tr class="separator:gad82b072a8c2cc4c5e32fc43e9822e634"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga10a95a922410cd0599c744a1b17d568e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga10a95a922410cd0599c744a1b17d568e">XZDMA_IXR_DONE_MASK</a>&#160;&#160;&#160;(0x00000400U)</td></tr>
<tr class="memdesc:ga10a95a922410cd0599c744a1b17d568e"><td class="mdescLeft">&#160;</td><td class="mdescRight">IXR All done mask.  <a href="#ga10a95a922410cd0599c744a1b17d568e">More...</a><br/></td></tr>
<tr class="separator:ga10a95a922410cd0599c744a1b17d568e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf2a5aa7481789b82f9a68ddbb803b072"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gaf2a5aa7481789b82f9a68ddbb803b072">XZDMA_IXR_ERR_MASK</a>&#160;&#160;&#160;(0x00000BF9U)</td></tr>
<tr class="memdesc:gaf2a5aa7481789b82f9a68ddbb803b072"><td class="mdescLeft">&#160;</td><td class="mdescRight">IXR all Error mask.  <a href="#gaf2a5aa7481789b82f9a68ddbb803b072">More...</a><br/></td></tr>
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Channel Control0 register bit masks and shifts</h2></td></tr>
<tr class="memitem:gac02824ee188615e27684eaea248c33eb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gac02824ee188615e27684eaea248c33eb">XZDMA_CTRL0_OVR_FETCH_MASK</a>&#160;&#160;&#160;(0x00000080U)</td></tr>
<tr class="memdesc:gac02824ee188615e27684eaea248c33eb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Over fetch mask.  <a href="#gac02824ee188615e27684eaea248c33eb">More...</a><br/></td></tr>
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<tr class="memitem:gaadd46eb8217527c9907eced132dd50e1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gaadd46eb8217527c9907eced132dd50e1">XZDMA_CTRL0_POINT_TYPE_MASK</a>&#160;&#160;&#160;(0x00000040U)</td></tr>
<tr class="memdesc:gaadd46eb8217527c9907eced132dd50e1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pointer type mask.  <a href="#gaadd46eb8217527c9907eced132dd50e1">More...</a><br/></td></tr>
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<tr class="memitem:gaec1a986d8168e84618d9513a2c56541b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gaec1a986d8168e84618d9513a2c56541b">XZDMA_CTRL0_MODE_MASK</a>&#160;&#160;&#160;(0x00000030U)</td></tr>
<tr class="memdesc:gaec1a986d8168e84618d9513a2c56541b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mode mask.  <a href="#gaec1a986d8168e84618d9513a2c56541b">More...</a><br/></td></tr>
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<tr class="memitem:ga1fc161baf17e0a6ba73942b50e0b2880"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga1fc161baf17e0a6ba73942b50e0b2880">XZDMA_CTRL0_WRONLY_MASK</a>&#160;&#160;&#160;(0x00000010U)</td></tr>
<tr class="memdesc:ga1fc161baf17e0a6ba73942b50e0b2880"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write only mask.  <a href="#ga1fc161baf17e0a6ba73942b50e0b2880">More...</a><br/></td></tr>
<tr class="separator:ga1fc161baf17e0a6ba73942b50e0b2880"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4bb41a2cbf283dbbfdba7f9bc1f5bac3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga4bb41a2cbf283dbbfdba7f9bc1f5bac3">XZDMA_CTRL0_RDONLY_MASK</a>&#160;&#160;&#160;(0x00000020U)</td></tr>
<tr class="memdesc:ga4bb41a2cbf283dbbfdba7f9bc1f5bac3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read only mask.  <a href="#ga4bb41a2cbf283dbbfdba7f9bc1f5bac3">More...</a><br/></td></tr>
<tr class="separator:ga4bb41a2cbf283dbbfdba7f9bc1f5bac3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1a026580754e7de6e4305af5390959f7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga1a026580754e7de6e4305af5390959f7">XZDMA_CTRL0_RATE_CNTL_MASK</a>&#160;&#160;&#160;(0x00000008U)</td></tr>
<tr class="memdesc:ga1a026580754e7de6e4305af5390959f7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Rate control mask.  <a href="#ga1a026580754e7de6e4305af5390959f7">More...</a><br/></td></tr>
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<tr class="memitem:ga7eca536c9dac7c46bb03eadd6a391402"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga7eca536c9dac7c46bb03eadd6a391402">XZDMA_CTRL0_CONT_ADDR_MASK</a>&#160;&#160;&#160;(0x00000004U)</td></tr>
<tr class="memdesc:ga7eca536c9dac7c46bb03eadd6a391402"><td class="mdescLeft">&#160;</td><td class="mdescRight">Continue address specified mask.  <a href="#ga7eca536c9dac7c46bb03eadd6a391402">More...</a><br/></td></tr>
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<tr class="memitem:gaa10c98a9560919004f43cbcbe665b5b3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gaa10c98a9560919004f43cbcbe665b5b3">XZDMA_CTRL0_CONT_MASK</a>&#160;&#160;&#160;(0x00000002U)</td></tr>
<tr class="memdesc:gaa10c98a9560919004f43cbcbe665b5b3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Continue mask.  <a href="#gaa10c98a9560919004f43cbcbe665b5b3">More...</a><br/></td></tr>
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<tr class="memitem:ga076b5d95f700c212f10016db79d3099a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga076b5d95f700c212f10016db79d3099a">XZDMA_CTRL0_OVR_FETCH_SHIFT</a>&#160;&#160;&#160;(7U)</td></tr>
<tr class="memdesc:ga076b5d95f700c212f10016db79d3099a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Over fetch shift.  <a href="#ga076b5d95f700c212f10016db79d3099a">More...</a><br/></td></tr>
<tr class="separator:ga076b5d95f700c212f10016db79d3099a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga891c765b2004ba8b15018f99261a9ccb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga891c765b2004ba8b15018f99261a9ccb">XZDMA_CTRL0_POINT_TYPE_SHIFT</a>&#160;&#160;&#160;(6U)</td></tr>
<tr class="memdesc:ga891c765b2004ba8b15018f99261a9ccb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pointer type shift.  <a href="#ga891c765b2004ba8b15018f99261a9ccb">More...</a><br/></td></tr>
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<tr class="memitem:ga66eaaf914136ac4eb5c4c758b4eea0ce"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga66eaaf914136ac4eb5c4c758b4eea0ce">XZDMA_CTRL0_MODE_SHIFT</a>&#160;&#160;&#160;(4U)</td></tr>
<tr class="memdesc:ga66eaaf914136ac4eb5c4c758b4eea0ce"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mode type shift.  <a href="#ga66eaaf914136ac4eb5c4c758b4eea0ce">More...</a><br/></td></tr>
<tr class="separator:ga66eaaf914136ac4eb5c4c758b4eea0ce"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadb99cf87cd8081ab8195fafb44005d8d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gadb99cf87cd8081ab8195fafb44005d8d">XZDMA_CTRL0_RESET_VALUE</a>&#160;&#160;&#160;(0x00000080U)</td></tr>
<tr class="memdesc:gadb99cf87cd8081ab8195fafb44005d8d"><td class="mdescLeft">&#160;</td><td class="mdescRight">CTRL0 reset value.  <a href="#gadb99cf87cd8081ab8195fafb44005d8d">More...</a><br/></td></tr>
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Channel Control1 register bit masks and shifts</h2></td></tr>
<tr class="memitem:ga4771477b0ae47b43caa80ce62cd5da26"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga4771477b0ae47b43caa80ce62cd5da26">XZDMA_CTRL1_SRC_ISSUE_MASK</a>&#160;&#160;&#160;(0x0000001FU)</td></tr>
<tr class="memdesc:ga4771477b0ae47b43caa80ce62cd5da26"><td class="mdescLeft">&#160;</td><td class="mdescRight">Source issue mask.  <a href="#ga4771477b0ae47b43caa80ce62cd5da26">More...</a><br/></td></tr>
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<tr class="memitem:gad1a614229d720d8abc65e98bba16def8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gad1a614229d720d8abc65e98bba16def8">XZDMA_CTRL1_RESET_VALUE</a>&#160;&#160;&#160;(0x000003FFU)</td></tr>
<tr class="memdesc:gad1a614229d720d8abc65e98bba16def8"><td class="mdescLeft">&#160;</td><td class="mdescRight">CTRL1 reset value.  <a href="#gad1a614229d720d8abc65e98bba16def8">More...</a><br/></td></tr>
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Channel Peripheral register bit masks and shifts</h2></td></tr>
<tr class="memitem:ga8348716bc8a747b60d1f8cd8451c6750"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga8348716bc8a747b60d1f8cd8451c6750">XZDMA_PERIF_PROG_CELL_CNT_MASK</a>&#160;&#160;&#160;(0x0000003EU)</td></tr>
<tr class="memdesc:ga8348716bc8a747b60d1f8cd8451c6750"><td class="mdescLeft">&#160;</td><td class="mdescRight">Peripheral program cell count.  <a href="#ga8348716bc8a747b60d1f8cd8451c6750">More...</a><br/></td></tr>
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<tr class="memitem:ga63e0ec02ac5103d16e751d5bd4878177"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga63e0ec02ac5103d16e751d5bd4878177">XZDMA_PERIF_SIDE_MASK</a>&#160;&#160;&#160;(0x00000002U)</td></tr>
<tr class="memdesc:ga63e0ec02ac5103d16e751d5bd4878177"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interface attached the side mask.  <a href="#ga63e0ec02ac5103d16e751d5bd4878177">More...</a><br/></td></tr>
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<tr class="memitem:gaaac5b3b9cef7eef0b1fcf253ad736314"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gaaac5b3b9cef7eef0b1fcf253ad736314">XZDMA_PERIF_EN_MASK</a>&#160;&#160;&#160;(0x00000001U)</td></tr>
<tr class="memdesc:gaaac5b3b9cef7eef0b1fcf253ad736314"><td class="mdescLeft">&#160;</td><td class="mdescRight">Peripheral flow control mask.  <a href="#gaaac5b3b9cef7eef0b1fcf253ad736314">More...</a><br/></td></tr>
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Channel Status register bit masks and shifts</h2></td></tr>
<tr class="memitem:ga26a7f12c178d08cf180df3a77dfa04c6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga26a7f12c178d08cf180df3a77dfa04c6">XZDMA_STS_DONE_ERR_MASK</a>&#160;&#160;&#160;(0x00000003U)</td></tr>
<tr class="memdesc:ga26a7f12c178d08cf180df3a77dfa04c6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Done with errors mask.  <a href="#ga26a7f12c178d08cf180df3a77dfa04c6">More...</a><br/></td></tr>
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<tr class="memitem:ga40cbf55c8d0f036f23a8a948a293b219"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga40cbf55c8d0f036f23a8a948a293b219">XZDMA_STS_BUSY_MASK</a>&#160;&#160;&#160;(0x00000002U)</td></tr>
<tr class="memdesc:ga40cbf55c8d0f036f23a8a948a293b219"><td class="mdescLeft">&#160;</td><td class="mdescRight">ZDMA is busy in transfer mask.  <a href="#ga40cbf55c8d0f036f23a8a948a293b219">More...</a><br/></td></tr>
<tr class="separator:ga40cbf55c8d0f036f23a8a948a293b219"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad902db953958b9834264c8f6801b0b27"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gad902db953958b9834264c8f6801b0b27">XZDMA_STS_PAUSE_MASK</a>&#160;&#160;&#160;(0x00000001U)</td></tr>
<tr class="memdesc:gad902db953958b9834264c8f6801b0b27"><td class="mdescLeft">&#160;</td><td class="mdescRight">ZDMA is in Pause state mask.  <a href="#gad902db953958b9834264c8f6801b0b27">More...</a><br/></td></tr>
<tr class="separator:gad902db953958b9834264c8f6801b0b27"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga98e3cde4448cc5bccfd0929889b78694"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga98e3cde4448cc5bccfd0929889b78694">XZDMA_STS_DONE_MASK</a>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memdesc:ga98e3cde4448cc5bccfd0929889b78694"><td class="mdescLeft">&#160;</td><td class="mdescRight">ZDMA done mask.  <a href="#ga98e3cde4448cc5bccfd0929889b78694">More...</a><br/></td></tr>
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<tr class="memitem:gad241ee38734a72209dee1fdd21cf573f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gad241ee38734a72209dee1fdd21cf573f">XZDMA_STS_ALL_MASK</a>&#160;&#160;&#160;(0x00000003U)</td></tr>
<tr class="memdesc:gad241ee38734a72209dee1fdd21cf573f"><td class="mdescLeft">&#160;</td><td class="mdescRight">ZDMA status mask.  <a href="#gad241ee38734a72209dee1fdd21cf573f">More...</a><br/></td></tr>
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Channel Data Attribute register bit masks and shifts</h2></td></tr>
<tr class="memitem:gaa881506ca78408d01653104a4250ab0c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gaa881506ca78408d01653104a4250ab0c">XZDMA_DATA_ATTR_ARBURST_MASK</a>&#160;&#160;&#160;(0x0C000000U)</td></tr>
<tr class="memdesc:gaa881506ca78408d01653104a4250ab0c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data ArBurst mask.  <a href="#gaa881506ca78408d01653104a4250ab0c">More...</a><br/></td></tr>
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<tr class="memitem:ga1c99701981861114d5e4d470728b4fbe"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga1c99701981861114d5e4d470728b4fbe">XZDMA_DATA_ATTR_ARCACHE_MASK</a>&#160;&#160;&#160;(0x03C00000U)</td></tr>
<tr class="memdesc:ga1c99701981861114d5e4d470728b4fbe"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data ArCache mask.  <a href="#ga1c99701981861114d5e4d470728b4fbe">More...</a><br/></td></tr>
<tr class="separator:ga1c99701981861114d5e4d470728b4fbe"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga38b5f7ce878bbea9db766a8a7b2c315b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga38b5f7ce878bbea9db766a8a7b2c315b">XZDMA_DATA_ATTR_ARQOS_MASK</a>&#160;&#160;&#160;(0x003C0000U)</td></tr>
<tr class="memdesc:ga38b5f7ce878bbea9db766a8a7b2c315b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data ARQos masks.  <a href="#ga38b5f7ce878bbea9db766a8a7b2c315b">More...</a><br/></td></tr>
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<tr class="memitem:ga07bd79ddfdc6aae7c165b7650f84256c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga07bd79ddfdc6aae7c165b7650f84256c">XZDMA_DATA_ATTR_ARLEN_MASK</a>&#160;&#160;&#160;(0x0003C000U)</td></tr>
<tr class="memdesc:ga07bd79ddfdc6aae7c165b7650f84256c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data Arlen mask.  <a href="#ga07bd79ddfdc6aae7c165b7650f84256c">More...</a><br/></td></tr>
<tr class="separator:ga07bd79ddfdc6aae7c165b7650f84256c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacd98a78505f4b50ccf9bcee2cf4d4217"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gacd98a78505f4b50ccf9bcee2cf4d4217">XZDMA_DATA_ATTR_AWBURST_MASK</a>&#160;&#160;&#160;(0x00003000U)</td></tr>
<tr class="memdesc:gacd98a78505f4b50ccf9bcee2cf4d4217"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data Awburst mask.  <a href="#gacd98a78505f4b50ccf9bcee2cf4d4217">More...</a><br/></td></tr>
<tr class="separator:gacd98a78505f4b50ccf9bcee2cf4d4217"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4dea58f251b7ccea5ea60374edec3c7d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga4dea58f251b7ccea5ea60374edec3c7d">XZDMA_DATA_ATTR_AWCACHE_MASK</a>&#160;&#160;&#160;(0x00000F00U)</td></tr>
<tr class="memdesc:ga4dea58f251b7ccea5ea60374edec3c7d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data AwCache mask.  <a href="#ga4dea58f251b7ccea5ea60374edec3c7d">More...</a><br/></td></tr>
<tr class="separator:ga4dea58f251b7ccea5ea60374edec3c7d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa7a54821c20e9a7e23252a5ec971c5bd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gaa7a54821c20e9a7e23252a5ec971c5bd">XZDMA_DATA_ATTR_AWQOS_MASK</a>&#160;&#160;&#160;(0x000000F0U)</td></tr>
<tr class="memdesc:gaa7a54821c20e9a7e23252a5ec971c5bd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data AwQos mask.  <a href="#gaa7a54821c20e9a7e23252a5ec971c5bd">More...</a><br/></td></tr>
<tr class="separator:gaa7a54821c20e9a7e23252a5ec971c5bd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga89ab3c509042ce8ddd0fec5c83a8bc8b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga89ab3c509042ce8ddd0fec5c83a8bc8b">XZDMA_DATA_ATTR_AWLEN_MASK</a>&#160;&#160;&#160;(0x0000000FU)</td></tr>
<tr class="memdesc:ga89ab3c509042ce8ddd0fec5c83a8bc8b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data Awlen mask.  <a href="#ga89ab3c509042ce8ddd0fec5c83a8bc8b">More...</a><br/></td></tr>
<tr class="separator:ga89ab3c509042ce8ddd0fec5c83a8bc8b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaefa353e6b08ee707e01d99d1c45be931"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gaefa353e6b08ee707e01d99d1c45be931">XZDMA_DATA_ATTR_ARBURST_SHIFT</a>&#160;&#160;&#160;(26U)</td></tr>
<tr class="memdesc:gaefa353e6b08ee707e01d99d1c45be931"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data Arburst shift.  <a href="#gaefa353e6b08ee707e01d99d1c45be931">More...</a><br/></td></tr>
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<tr class="memitem:ga3fe36e16ad31159f99a640e9c3bb6568"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga3fe36e16ad31159f99a640e9c3bb6568">XZDMA_DATA_ATTR_ARCACHE_SHIFT</a>&#160;&#160;&#160;(22U)</td></tr>
<tr class="memdesc:ga3fe36e16ad31159f99a640e9c3bb6568"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data ArCache shift.  <a href="#ga3fe36e16ad31159f99a640e9c3bb6568">More...</a><br/></td></tr>
<tr class="separator:ga3fe36e16ad31159f99a640e9c3bb6568"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf3d3eac7b0b5139637930e1d58775d2b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gaf3d3eac7b0b5139637930e1d58775d2b">XZDMA_DATA_ATTR_ARQOS_SHIFT</a>&#160;&#160;&#160;(18U)</td></tr>
<tr class="memdesc:gaf3d3eac7b0b5139637930e1d58775d2b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data ARQos shift.  <a href="#gaf3d3eac7b0b5139637930e1d58775d2b">More...</a><br/></td></tr>
<tr class="separator:gaf3d3eac7b0b5139637930e1d58775d2b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad57774673e1e4297dada019e7a1351a0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gad57774673e1e4297dada019e7a1351a0">XZDMA_DATA_ATTR_ARLEN_SHIFT</a>&#160;&#160;&#160;(14U)</td></tr>
<tr class="memdesc:gad57774673e1e4297dada019e7a1351a0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data Arlen shift.  <a href="#gad57774673e1e4297dada019e7a1351a0">More...</a><br/></td></tr>
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<tr class="memitem:ga7002622e4bf8c047681ebe4b0efdedc7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga7002622e4bf8c047681ebe4b0efdedc7">XZDMA_DATA_ATTR_AWBURST_SHIFT</a>&#160;&#160;&#160;(12U)</td></tr>
<tr class="memdesc:ga7002622e4bf8c047681ebe4b0efdedc7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data Awburst shift.  <a href="#ga7002622e4bf8c047681ebe4b0efdedc7">More...</a><br/></td></tr>
<tr class="separator:ga7002622e4bf8c047681ebe4b0efdedc7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0320f84e12d6075b163f5adf415496fc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga0320f84e12d6075b163f5adf415496fc">XZDMA_DATA_ATTR_AWCACHE_SHIFT</a>&#160;&#160;&#160;(8U)</td></tr>
<tr class="memdesc:ga0320f84e12d6075b163f5adf415496fc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data Awcache shift.  <a href="#ga0320f84e12d6075b163f5adf415496fc">More...</a><br/></td></tr>
<tr class="separator:ga0320f84e12d6075b163f5adf415496fc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab5a55d0a765874f387e853cfebaa48a7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gab5a55d0a765874f387e853cfebaa48a7">XZDMA_DATA_ATTR_AWQOS_SHIFT</a>&#160;&#160;&#160;(4U)</td></tr>
<tr class="memdesc:gab5a55d0a765874f387e853cfebaa48a7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data Awqos shift.  <a href="#gab5a55d0a765874f387e853cfebaa48a7">More...</a><br/></td></tr>
<tr class="separator:gab5a55d0a765874f387e853cfebaa48a7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6fc39f50cddb793d1ffa51bf3b36e471"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga6fc39f50cddb793d1ffa51bf3b36e471">XZDMA_DATA_ATTR_RESET_VALUE</a>&#160;&#160;&#160;(0x0483D20FU)</td></tr>
<tr class="memdesc:ga6fc39f50cddb793d1ffa51bf3b36e471"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data Attributes reset value.  <a href="#ga6fc39f50cddb793d1ffa51bf3b36e471">More...</a><br/></td></tr>
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Channel DSCR Attribute register bit masks and shifts</h2></td></tr>
<tr class="memitem:ga0c761d93384a2590517648a21792a938"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga0c761d93384a2590517648a21792a938">XZDMA_DSCR_ATTR_AXCOHRNT_MASK</a>&#160;&#160;&#160;(0x00000100U)</td></tr>
<tr class="memdesc:ga0c761d93384a2590517648a21792a938"><td class="mdescLeft">&#160;</td><td class="mdescRight">Descriptor coherent mask.  <a href="#ga0c761d93384a2590517648a21792a938">More...</a><br/></td></tr>
<tr class="separator:ga0c761d93384a2590517648a21792a938"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabc067f3d88ea147d23f49168fc3f7de6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gabc067f3d88ea147d23f49168fc3f7de6">XZDMA_DSCR_ATTR_AXCACHE_MASK</a>&#160;&#160;&#160;(0x000000F0U)</td></tr>
<tr class="memdesc:gabc067f3d88ea147d23f49168fc3f7de6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Descriptor cache mask.  <a href="#gabc067f3d88ea147d23f49168fc3f7de6">More...</a><br/></td></tr>
<tr class="separator:gabc067f3d88ea147d23f49168fc3f7de6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab1f6da6a358a3f6c721b9fccabc6b4d1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gab1f6da6a358a3f6c721b9fccabc6b4d1">XZDMA_DSCR_ATTR_AXQOS_MASK</a>&#160;&#160;&#160;(0x0000000FU)</td></tr>
<tr class="memdesc:gab1f6da6a358a3f6c721b9fccabc6b4d1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Descriptor AxQos mask.  <a href="#gab1f6da6a358a3f6c721b9fccabc6b4d1">More...</a><br/></td></tr>
<tr class="separator:gab1f6da6a358a3f6c721b9fccabc6b4d1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacf85276abd3537f849cb9279861570a4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gacf85276abd3537f849cb9279861570a4">XZDMA_DSCR_ATTR_AXCOHRNT_SHIFT</a>&#160;&#160;&#160;(8U)</td></tr>
<tr class="memdesc:gacf85276abd3537f849cb9279861570a4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Descriptor coherent shift.  <a href="#gacf85276abd3537f849cb9279861570a4">More...</a><br/></td></tr>
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<tr class="memitem:ga6cae905057544443789c744ace6b7700"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga6cae905057544443789c744ace6b7700">XZDMA_DSCR_ATTR_AXCACHE_SHIFT</a>&#160;&#160;&#160;(4U)</td></tr>
<tr class="memdesc:ga6cae905057544443789c744ace6b7700"><td class="mdescLeft">&#160;</td><td class="mdescRight">Descriptor cache shift.  <a href="#ga6cae905057544443789c744ace6b7700">More...</a><br/></td></tr>
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<tr class="memitem:gaeb9a7bdb3c0b6be0adf689c98e0526c3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gaeb9a7bdb3c0b6be0adf689c98e0526c3">XZDMA_DSCR_ATTR_RESET_VALUE</a>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memdesc:gaeb9a7bdb3c0b6be0adf689c98e0526c3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dscr Attributes reset value.  <a href="#gaeb9a7bdb3c0b6be0adf689c98e0526c3">More...</a><br/></td></tr>
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<tr class="memitem:gac4e0bd4cf99586a764ac52fdd43c4a0c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gac4e0bd4cf99586a764ac52fdd43c4a0c">XZDMA_CH_WR_ONLY_RESET_VALUE</a>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memdesc:gac4e0bd4cf99586a764ac52fdd43c4a0c"><td class="mdescLeft">&#160;</td><td class="mdescRight">CH write only reset value.  <a href="#gac4e0bd4cf99586a764ac52fdd43c4a0c">More...</a><br/></td></tr>
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Channel Source/Destination Word0 register bit mask</h2></td></tr>
<tr class="memitem:gad1af37520a9ff8f0b18ae5cb2af2f9f4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gad1af37520a9ff8f0b18ae5cb2af2f9f4">XZDMA_WORD0_LSB_MASK</a>&#160;&#160;&#160;(0xFFFFFFFFU)</td></tr>
<tr class="memdesc:gad1af37520a9ff8f0b18ae5cb2af2f9f4"><td class="mdescLeft">&#160;</td><td class="mdescRight">LSB Address mask.  <a href="#gad1af37520a9ff8f0b18ae5cb2af2f9f4">More...</a><br/></td></tr>
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Channel Source/Destination Word1 register bit mask</h2></td></tr>
<tr class="memitem:gac8bb93895e5f91a7c3133e1cf3f51cf0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gac8bb93895e5f91a7c3133e1cf3f51cf0">XZDMA_WORD1_MSB_MASK</a>&#160;&#160;&#160;(0x0001FFFFU)</td></tr>
<tr class="memdesc:gac8bb93895e5f91a7c3133e1cf3f51cf0"><td class="mdescLeft">&#160;</td><td class="mdescRight">MSB Address mask.  <a href="#gac8bb93895e5f91a7c3133e1cf3f51cf0">More...</a><br/></td></tr>
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<tr class="memitem:ga055f4c7ad4789221cc57f6006e616d7f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga055f4c7ad4789221cc57f6006e616d7f">XZDMA_WORD1_MSB_SHIFT</a>&#160;&#160;&#160;(32U)</td></tr>
<tr class="memdesc:ga055f4c7ad4789221cc57f6006e616d7f"><td class="mdescLeft">&#160;</td><td class="mdescRight">MSB Address shift.  <a href="#ga055f4c7ad4789221cc57f6006e616d7f">More...</a><br/></td></tr>
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Channel Source/Destination Word2 register bit mask</h2></td></tr>
<tr class="memitem:ga806daa6c38fb4441e8031789784b89b3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga806daa6c38fb4441e8031789784b89b3">XZDMA_WORD2_SIZE_MASK</a>&#160;&#160;&#160;(0x3FFFFFFFU)</td></tr>
<tr class="memdesc:ga806daa6c38fb4441e8031789784b89b3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Size mask.  <a href="#ga806daa6c38fb4441e8031789784b89b3">More...</a><br/></td></tr>
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Channel Source/Destination Word3 register bit masks and shifts</h2></td></tr>
<tr class="memitem:ga8485f09f7b5e6c611b533862b4023860"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga8485f09f7b5e6c611b533862b4023860">XZDMA_WORD3_CMD_MASK</a>&#160;&#160;&#160;(0x00000018U)</td></tr>
<tr class="memdesc:ga8485f09f7b5e6c611b533862b4023860"><td class="mdescLeft">&#160;</td><td class="mdescRight">Cmd mask.  <a href="#ga8485f09f7b5e6c611b533862b4023860">More...</a><br/></td></tr>
<tr class="separator:ga8485f09f7b5e6c611b533862b4023860"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga93e3bffa167d70e2f56c8e93d114d335"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga93e3bffa167d70e2f56c8e93d114d335">XZDMA_WORD3_CMD_SHIFT</a>&#160;&#160;&#160;(3U)</td></tr>
<tr class="memdesc:ga93e3bffa167d70e2f56c8e93d114d335"><td class="mdescLeft">&#160;</td><td class="mdescRight">Cmd shift.  <a href="#ga93e3bffa167d70e2f56c8e93d114d335">More...</a><br/></td></tr>
<tr class="separator:ga93e3bffa167d70e2f56c8e93d114d335"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacf5d8cf4ecff1be0f2dacfa5fb90c8d9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gacf5d8cf4ecff1be0f2dacfa5fb90c8d9">XZDMA_WORD3_CMD_NXTVALID_MASK</a>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memdesc:gacf5d8cf4ecff1be0f2dacfa5fb90c8d9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Next Dscr is valid mask.  <a href="#gacf5d8cf4ecff1be0f2dacfa5fb90c8d9">More...</a><br/></td></tr>
<tr class="separator:gacf5d8cf4ecff1be0f2dacfa5fb90c8d9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga68ef623af6d8fe3215167f134daae66c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga68ef623af6d8fe3215167f134daae66c">XZDMA_WORD3_CMD_PAUSE_MASK</a>&#160;&#160;&#160;(0x00000008U)</td></tr>
<tr class="memdesc:ga68ef623af6d8fe3215167f134daae66c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pause after this dscr mask.  <a href="#ga68ef623af6d8fe3215167f134daae66c">More...</a><br/></td></tr>
<tr class="separator:ga68ef623af6d8fe3215167f134daae66c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0ec4db1fe53ded3ce7696e291b5188c2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga0ec4db1fe53ded3ce7696e291b5188c2">XZDMA_WORD3_CMD_STOP_MASK</a>&#160;&#160;&#160;(0x00000010U)</td></tr>
<tr class="memdesc:ga0ec4db1fe53ded3ce7696e291b5188c2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Stop after this ..* dscr mask.  <a href="#ga0ec4db1fe53ded3ce7696e291b5188c2">More...</a><br/></td></tr>
<tr class="separator:ga0ec4db1fe53ded3ce7696e291b5188c2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf7a5b80dbf16443b2f9b0247f7da946d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gaf7a5b80dbf16443b2f9b0247f7da946d">XZDMA_WORD3_INTR_MASK</a>&#160;&#160;&#160;(0x00000004U)</td></tr>
<tr class="memdesc:gaf7a5b80dbf16443b2f9b0247f7da946d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt enable or disable mask.  <a href="#gaf7a5b80dbf16443b2f9b0247f7da946d">More...</a><br/></td></tr>
<tr class="separator:gaf7a5b80dbf16443b2f9b0247f7da946d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga482e905a7456e30f19e0a6b465e4f591"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga482e905a7456e30f19e0a6b465e4f591">XZDMA_WORD3_INTR_SHIFT</a>&#160;&#160;&#160;(2U)</td></tr>
<tr class="memdesc:ga482e905a7456e30f19e0a6b465e4f591"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt enable disable shift.  <a href="#ga482e905a7456e30f19e0a6b465e4f591">More...</a><br/></td></tr>
<tr class="separator:ga482e905a7456e30f19e0a6b465e4f591"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga993831fb92a5b1b006e16fe087fd1b85"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga993831fb92a5b1b006e16fe087fd1b85">XZDMA_WORD3_TYPE_MASK</a>&#160;&#160;&#160;(0x00000002U)</td></tr>
<tr class="memdesc:ga993831fb92a5b1b006e16fe087fd1b85"><td class="mdescLeft">&#160;</td><td class="mdescRight">Type of Descriptor mask.  <a href="#ga993831fb92a5b1b006e16fe087fd1b85">More...</a><br/></td></tr>
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<tr class="memitem:ga69cfbc1e5425c35ed1bd98376cedc61a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga69cfbc1e5425c35ed1bd98376cedc61a">XZDMA_WORD3_TYPE_SHIFT</a>&#160;&#160;&#160;(1U)</td></tr>
<tr class="memdesc:ga69cfbc1e5425c35ed1bd98376cedc61a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Type of Descriptor Shift.  <a href="#ga69cfbc1e5425c35ed1bd98376cedc61a">More...</a><br/></td></tr>
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<tr class="memitem:gac2aeec8d3bc367ed78ec8a2436f780a7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gac2aeec8d3bc367ed78ec8a2436f780a7">XZDMA_WORD3_COHRNT_MASK</a>&#160;&#160;&#160;(0x00000001U)</td></tr>
<tr class="memdesc:gac2aeec8d3bc367ed78ec8a2436f780a7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Coherence mask.  <a href="#gac2aeec8d3bc367ed78ec8a2436f780a7">More...</a><br/></td></tr>
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Channel Source/Destination start address or current payload</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrped57422e16cbc0bdd536f14635bea974"></a>MSB register bit mask </p>
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<tr class="memitem:ga8b4169e9fb49a54f7c287d6ae3e57654"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga8b4169e9fb49a54f7c287d6ae3e57654">XZDMA_START_MSB_ADDR_MASK</a>&#160;&#160;&#160;(0x0001FFFFU)</td></tr>
<tr class="memdesc:ga8b4169e9fb49a54f7c287d6ae3e57654"><td class="mdescLeft">&#160;</td><td class="mdescRight">Start msb address mask.  <a href="#ga8b4169e9fb49a54f7c287d6ae3e57654">More...</a><br/></td></tr>
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Channel Rate control count register bit mask</h2></td></tr>
<tr class="memitem:ga88b8a953147eb61c544be509076c84e3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga88b8a953147eb61c544be509076c84e3">XZDMA_CH_RATE_CNTL_MASK</a>&#160;&#160;&#160;(0x00000FFFU)</td></tr>
<tr class="memdesc:ga88b8a953147eb61c544be509076c84e3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Channel rate control mask.  <a href="#ga88b8a953147eb61c544be509076c84e3">More...</a><br/></td></tr>
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Channel Source/Destination Interrupt account count register bit mask</h2></td></tr>
<tr class="memitem:gaae2ef41062c0004503031e155538ffa6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gaae2ef41062c0004503031e155538ffa6">XZDMA_CH_IRQ_ACCT_MASK</a>&#160;&#160;&#160;(0x000000FFU)</td></tr>
<tr class="memdesc:gaae2ef41062c0004503031e155538ffa6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt count mask.  <a href="#gaae2ef41062c0004503031e155538ffa6">More...</a><br/></td></tr>
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Channel debug register 0/1 bit mask</h2></td></tr>
<tr class="memitem:ga0876c52b246b078b952127de1c6db4e7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga0876c52b246b078b952127de1c6db4e7">XZDMA_CH_DBG_CMN_BUF_MASK</a>&#160;&#160;&#160;(0x000001FFU)</td></tr>
<tr class="memdesc:ga0876c52b246b078b952127de1c6db4e7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Common buffer count mask.  <a href="#ga0876c52b246b078b952127de1c6db4e7">More...</a><br/></td></tr>
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Channel control2 register bit mask</h2></td></tr>
<tr class="memitem:gaca1442dbc95787a8aaa20b1f8640a85a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gaca1442dbc95787a8aaa20b1f8640a85a">XZDMA_CH_CTRL2_EN_MASK</a>&#160;&#160;&#160;(0x00000001U)</td></tr>
<tr class="memdesc:gaca1442dbc95787a8aaa20b1f8640a85a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Channel enable mask.  <a href="#gaca1442dbc95787a8aaa20b1f8640a85a">More...</a><br/></td></tr>
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<tr class="memitem:ga90faf95a70486b3e9f1782f2e7a89767"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#ga90faf95a70486b3e9f1782f2e7a89767">XZDMA_CH_CTRL2_DIS_MASK</a>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memdesc:ga90faf95a70486b3e9f1782f2e7a89767"><td class="mdescLeft">&#160;</td><td class="mdescRight">Channel disable mask.  <a href="#ga90faf95a70486b3e9f1782f2e7a89767">More...</a><br/></td></tr>
<tr class="separator:ga90faf95a70486b3e9f1782f2e7a89767"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadf9417e895645aaec67c6985b8c6f5eb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__zdma.html#gadf9417e895645aaec67c6985b8c6f5eb">XZDMA_WRITE_TO_CLEAR_MASK</a>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memdesc:gadf9417e895645aaec67c6985b8c6f5eb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write to clear mask.  <a href="#gadf9417e895645aaec67c6985b8c6f5eb">More...</a><br/></td></tr>
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<h2 class="groupheader">Macro Definition Documentation</h2>
<a class="anchor" id="ga90faf95a70486b3e9f1782f2e7a89767"></a>
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          <td class="memname">#define XZDMA_CH_CTRL2_DIS_MASK&#160;&#160;&#160;(0x00000000U)</td>
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</div><div class="memdoc">

<p>Channel disable mask. </p>

</div>
</div>
<a class="anchor" id="gaca1442dbc95787a8aaa20b1f8640a85a"></a>
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          <td class="memname">#define XZDMA_CH_CTRL2_EN_MASK&#160;&#160;&#160;(0x00000001U)</td>
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      </table>
</div><div class="memdoc">

<p>Channel enable mask. </p>

</div>
</div>
<a class="anchor" id="ga0876c52b246b078b952127de1c6db4e7"></a>
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          <td class="memname">#define XZDMA_CH_DBG_CMN_BUF_MASK&#160;&#160;&#160;(0x000001FFU)</td>
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      </table>
</div><div class="memdoc">

<p>Common buffer count mask. </p>

</div>
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          <td class="memname">#define XZDMA_CH_IRQ_ACCT_MASK&#160;&#160;&#160;(0x000000FFU)</td>
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<p>Interrupt count mask. </p>

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<a class="anchor" id="ga88b8a953147eb61c544be509076c84e3"></a>
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          <td class="memname">#define XZDMA_CH_RATE_CNTL_MASK&#160;&#160;&#160;(0x00000FFFU)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Channel rate control mask. </p>

</div>
</div>
<a class="anchor" id="gac4e0bd4cf99586a764ac52fdd43c4a0c"></a>
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          <td class="memname">#define XZDMA_CH_WR_ONLY_RESET_VALUE&#160;&#160;&#160;(0x00000000U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>CH write only reset value. </p>

<p>Referenced by <a class="el" href="group__zdma.html#gaf236c2323636d87ab0888b2d6f55a313">XZDma_Reset()</a>.</p>

</div>
</div>
<a class="anchor" id="ga7eca536c9dac7c46bb03eadd6a391402"></a>
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<div class="memproto">
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        <tr>
          <td class="memname">#define XZDMA_CTRL0_CONT_ADDR_MASK&#160;&#160;&#160;(0x00000004U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Continue address specified mask. </p>

<p>Referenced by <a class="el" href="group__zdma.html#ga7cb39835692353e5c34d95938b8ce8d0">XZDma_Resume()</a>.</p>

</div>
</div>
<a class="anchor" id="gaa10c98a9560919004f43cbcbe665b5b3"></a>
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<div class="memproto">
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        <tr>
          <td class="memname">#define XZDMA_CTRL0_CONT_MASK&#160;&#160;&#160;(0x00000002U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Continue mask. </p>

<p>Referenced by <a class="el" href="group__zdma.html#ga7cb39835692353e5c34d95938b8ce8d0">XZDma_Resume()</a>.</p>

</div>
</div>
<a class="anchor" id="gaec1a986d8168e84618d9513a2c56541b"></a>
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<div class="memproto">
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          <td class="memname">#define XZDMA_CTRL0_MODE_MASK&#160;&#160;&#160;(0x00000030U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Mode mask. </p>

<p>Referenced by <a class="el" href="group__zdma.html#gaf1772f190fe0a67a17c78f5f23fc8024">XZDma_SetMode()</a>.</p>

</div>
</div>
<a class="anchor" id="ga66eaaf914136ac4eb5c4c758b4eea0ce"></a>
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        <tr>
          <td class="memname">#define XZDMA_CTRL0_MODE_SHIFT&#160;&#160;&#160;(4U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Mode type shift. </p>

</div>
</div>
<a class="anchor" id="gac02824ee188615e27684eaea248c33eb"></a>
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<div class="memproto">
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          <td class="memname">#define XZDMA_CTRL0_OVR_FETCH_MASK&#160;&#160;&#160;(0x00000080U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Over fetch mask. </p>

<p>Referenced by <a class="el" href="group__zdma.html#ga166edb355a4395294e7910c68f4840ca">XZDma_SelfTest()</a>, and <a class="el" href="group__zdma.html#ga9f83e94a6ecae10b6bff851d76ffef24">XZDma_SetChDataConfig()</a>.</p>

</div>
</div>
<a class="anchor" id="ga076b5d95f700c212f10016db79d3099a"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define XZDMA_CTRL0_OVR_FETCH_SHIFT&#160;&#160;&#160;(7U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Over fetch shift. </p>

<p>Referenced by <a class="el" href="group__zdma.html#ga9f83e94a6ecae10b6bff851d76ffef24">XZDma_SetChDataConfig()</a>.</p>

</div>
</div>
<a class="anchor" id="gaadd46eb8217527c9907eced132dd50e1"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XZDMA_CTRL0_POINT_TYPE_MASK&#160;&#160;&#160;(0x00000040U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Pointer type mask. </p>

<p>Referenced by <a class="el" href="group__zdma.html#gaf1772f190fe0a67a17c78f5f23fc8024">XZDma_SetMode()</a>.</p>

</div>
</div>
<a class="anchor" id="ga891c765b2004ba8b15018f99261a9ccb"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XZDMA_CTRL0_POINT_TYPE_SHIFT&#160;&#160;&#160;(6U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Pointer type shift. </p>

</div>
</div>
<a class="anchor" id="ga1a026580754e7de6e4305af5390959f7"></a>
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<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XZDMA_CTRL0_RATE_CNTL_MASK&#160;&#160;&#160;(0x00000008U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Rate control mask. </p>

</div>
</div>
<a class="anchor" id="ga4bb41a2cbf283dbbfdba7f9bc1f5bac3"></a>
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<div class="memproto">
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        <tr>
          <td class="memname">#define XZDMA_CTRL0_RDONLY_MASK&#160;&#160;&#160;(0x00000020U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Read only mask. </p>

<p>Referenced by <a class="el" href="group__zdma.html#gaf1772f190fe0a67a17c78f5f23fc8024">XZDma_SetMode()</a>.</p>

</div>
</div>
<a class="anchor" id="gadb99cf87cd8081ab8195fafb44005d8d"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XZDMA_CTRL0_RESET_VALUE&#160;&#160;&#160;(0x00000080U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>CTRL0 reset value. </p>

<p>Referenced by <a class="el" href="group__zdma.html#gaf236c2323636d87ab0888b2d6f55a313">XZDma_Reset()</a>.</p>

</div>
</div>
<a class="anchor" id="ga1fc161baf17e0a6ba73942b50e0b2880"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XZDMA_CTRL0_WRONLY_MASK&#160;&#160;&#160;(0x00000010U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Write only mask. </p>

<p>Referenced by <a class="el" href="group__zdma.html#gaf1772f190fe0a67a17c78f5f23fc8024">XZDma_SetMode()</a>.</p>

</div>
</div>
<a class="anchor" id="gad1a614229d720d8abc65e98bba16def8"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XZDMA_CTRL1_RESET_VALUE&#160;&#160;&#160;(0x000003FFU)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>CTRL1 reset value. </p>

<p>Referenced by <a class="el" href="group__zdma.html#gaf236c2323636d87ab0888b2d6f55a313">XZDma_Reset()</a>.</p>

</div>
</div>
<a class="anchor" id="ga4771477b0ae47b43caa80ce62cd5da26"></a>
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<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XZDMA_CTRL1_SRC_ISSUE_MASK&#160;&#160;&#160;(0x0000001FU)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Source issue mask. </p>

<p>Referenced by <a class="el" href="group__zdma.html#ga9f83e94a6ecae10b6bff851d76ffef24">XZDma_SetChDataConfig()</a>.</p>

</div>
</div>
<a class="anchor" id="gaa881506ca78408d01653104a4250ab0c"></a>
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<div class="memproto">
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        <tr>
          <td class="memname">#define XZDMA_DATA_ATTR_ARBURST_MASK&#160;&#160;&#160;(0x0C000000U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Data ArBurst mask. </p>

<p>Referenced by <a class="el" href="group__zdma.html#ga9f83e94a6ecae10b6bff851d76ffef24">XZDma_SetChDataConfig()</a>.</p>

</div>
</div>
<a class="anchor" id="gaefa353e6b08ee707e01d99d1c45be931"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XZDMA_DATA_ATTR_ARBURST_SHIFT&#160;&#160;&#160;(26U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Data Arburst shift. </p>

<p>Referenced by <a class="el" href="group__zdma.html#ga9f83e94a6ecae10b6bff851d76ffef24">XZDma_SetChDataConfig()</a>.</p>

</div>
</div>
<a class="anchor" id="ga1c99701981861114d5e4d470728b4fbe"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define XZDMA_DATA_ATTR_ARCACHE_MASK&#160;&#160;&#160;(0x03C00000U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Data ArCache mask. </p>

<p>Referenced by <a class="el" href="group__zdma.html#ga9f83e94a6ecae10b6bff851d76ffef24">XZDma_SetChDataConfig()</a>.</p>

</div>
</div>
<a class="anchor" id="ga3fe36e16ad31159f99a640e9c3bb6568"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XZDMA_DATA_ATTR_ARCACHE_SHIFT&#160;&#160;&#160;(22U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Data ArCache shift. </p>

<p>Referenced by <a class="el" href="group__zdma.html#ga9f83e94a6ecae10b6bff851d76ffef24">XZDma_SetChDataConfig()</a>.</p>

</div>
</div>
<a class="anchor" id="ga07bd79ddfdc6aae7c165b7650f84256c"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XZDMA_DATA_ATTR_ARLEN_MASK&#160;&#160;&#160;(0x0003C000U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Data Arlen mask. </p>

<p>Referenced by <a class="el" href="group__zdma.html#ga9f83e94a6ecae10b6bff851d76ffef24">XZDma_SetChDataConfig()</a>.</p>

</div>
</div>
<a class="anchor" id="gad57774673e1e4297dada019e7a1351a0"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XZDMA_DATA_ATTR_ARLEN_SHIFT&#160;&#160;&#160;(14U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Data Arlen shift. </p>

<p>Referenced by <a class="el" href="group__zdma.html#ga9f83e94a6ecae10b6bff851d76ffef24">XZDma_SetChDataConfig()</a>.</p>

</div>
</div>
<a class="anchor" id="ga38b5f7ce878bbea9db766a8a7b2c315b"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XZDMA_DATA_ATTR_ARQOS_MASK&#160;&#160;&#160;(0x003C0000U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Data ARQos masks. </p>

<p>Referenced by <a class="el" href="group__zdma.html#ga9f83e94a6ecae10b6bff851d76ffef24">XZDma_SetChDataConfig()</a>.</p>

</div>
</div>
<a class="anchor" id="gaf3d3eac7b0b5139637930e1d58775d2b"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XZDMA_DATA_ATTR_ARQOS_SHIFT&#160;&#160;&#160;(18U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Data ARQos shift. </p>

<p>Referenced by <a class="el" href="group__zdma.html#ga9f83e94a6ecae10b6bff851d76ffef24">XZDma_SetChDataConfig()</a>.</p>

</div>
</div>
<a class="anchor" id="gacd98a78505f4b50ccf9bcee2cf4d4217"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XZDMA_DATA_ATTR_AWBURST_MASK&#160;&#160;&#160;(0x00003000U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Data Awburst mask. </p>

<p>Referenced by <a class="el" href="group__zdma.html#ga9f83e94a6ecae10b6bff851d76ffef24">XZDma_SetChDataConfig()</a>.</p>

</div>
</div>
<a class="anchor" id="ga7002622e4bf8c047681ebe4b0efdedc7"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XZDMA_DATA_ATTR_AWBURST_SHIFT&#160;&#160;&#160;(12U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Data Awburst shift. </p>

<p>Referenced by <a class="el" href="group__zdma.html#ga9f83e94a6ecae10b6bff851d76ffef24">XZDma_SetChDataConfig()</a>.</p>

</div>
</div>
<a class="anchor" id="ga4dea58f251b7ccea5ea60374edec3c7d"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XZDMA_DATA_ATTR_AWCACHE_MASK&#160;&#160;&#160;(0x00000F00U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Data AwCache mask. </p>

<p>Referenced by <a class="el" href="group__zdma.html#ga9f83e94a6ecae10b6bff851d76ffef24">XZDma_SetChDataConfig()</a>.</p>

</div>
</div>
<a class="anchor" id="ga0320f84e12d6075b163f5adf415496fc"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XZDMA_DATA_ATTR_AWCACHE_SHIFT&#160;&#160;&#160;(8U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Data Awcache shift. </p>

<p>Referenced by <a class="el" href="group__zdma.html#ga9f83e94a6ecae10b6bff851d76ffef24">XZDma_SetChDataConfig()</a>.</p>

</div>
</div>
<a class="anchor" id="ga89ab3c509042ce8ddd0fec5c83a8bc8b"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XZDMA_DATA_ATTR_AWLEN_MASK&#160;&#160;&#160;(0x0000000FU)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Data Awlen mask. </p>

<p>Referenced by <a class="el" href="group__zdma.html#ga9f83e94a6ecae10b6bff851d76ffef24">XZDma_SetChDataConfig()</a>.</p>

</div>
</div>
<a class="anchor" id="gaa7a54821c20e9a7e23252a5ec971c5bd"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XZDMA_DATA_ATTR_AWQOS_MASK&#160;&#160;&#160;(0x000000F0U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Data AwQos mask. </p>

<p>Referenced by <a class="el" href="group__zdma.html#ga9f83e94a6ecae10b6bff851d76ffef24">XZDma_SetChDataConfig()</a>.</p>

</div>
</div>
<a class="anchor" id="gab5a55d0a765874f387e853cfebaa48a7"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XZDMA_DATA_ATTR_AWQOS_SHIFT&#160;&#160;&#160;(4U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Data Awqos shift. </p>

<p>Referenced by <a class="el" href="group__zdma.html#ga9f83e94a6ecae10b6bff851d76ffef24">XZDma_SetChDataConfig()</a>.</p>

</div>
</div>
<a class="anchor" id="ga6fc39f50cddb793d1ffa51bf3b36e471"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XZDMA_DATA_ATTR_RESET_VALUE&#160;&#160;&#160;(0x0483D20FU)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Data Attributes reset value. </p>

<p>Referenced by <a class="el" href="group__zdma.html#gaf236c2323636d87ab0888b2d6f55a313">XZDma_Reset()</a>.</p>

</div>
</div>
<a class="anchor" id="gabc067f3d88ea147d23f49168fc3f7de6"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XZDMA_DSCR_ATTR_AXCACHE_MASK&#160;&#160;&#160;(0x000000F0U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Descriptor cache mask. </p>

<p>Referenced by <a class="el" href="group__zdma.html#ga860cde1482bc78429ea5c6f1d3da9014">XZDma_SetChDscrConfig()</a>.</p>

</div>
</div>
<a class="anchor" id="ga6cae905057544443789c744ace6b7700"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XZDMA_DSCR_ATTR_AXCACHE_SHIFT&#160;&#160;&#160;(4U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Descriptor cache shift. </p>

<p>Referenced by <a class="el" href="group__zdma.html#ga860cde1482bc78429ea5c6f1d3da9014">XZDma_SetChDscrConfig()</a>.</p>

</div>
</div>
<a class="anchor" id="ga0c761d93384a2590517648a21792a938"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XZDMA_DSCR_ATTR_AXCOHRNT_MASK&#160;&#160;&#160;(0x00000100U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Descriptor coherent mask. </p>

<p>Referenced by <a class="el" href="group__zdma.html#ga860cde1482bc78429ea5c6f1d3da9014">XZDma_SetChDscrConfig()</a>.</p>

</div>
</div>
<a class="anchor" id="gacf85276abd3537f849cb9279861570a4"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XZDMA_DSCR_ATTR_AXCOHRNT_SHIFT&#160;&#160;&#160;(8U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Descriptor coherent shift. </p>

<p>Referenced by <a class="el" href="group__zdma.html#gaf236c2323636d87ab0888b2d6f55a313">XZDma_Reset()</a>, and <a class="el" href="group__zdma.html#ga860cde1482bc78429ea5c6f1d3da9014">XZDma_SetChDscrConfig()</a>.</p>

</div>
</div>
<a class="anchor" id="gab1f6da6a358a3f6c721b9fccabc6b4d1"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XZDMA_DSCR_ATTR_AXQOS_MASK&#160;&#160;&#160;(0x0000000FU)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Descriptor AxQos mask. </p>

<p>Referenced by <a class="el" href="group__zdma.html#ga860cde1482bc78429ea5c6f1d3da9014">XZDma_SetChDscrConfig()</a>.</p>

</div>
</div>
<a class="anchor" id="gaeb9a7bdb3c0b6be0adf689c98e0526c3"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XZDMA_DSCR_ATTR_RESET_VALUE&#160;&#160;&#160;(0x00000000U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Dscr Attributes reset value. </p>

<p>Referenced by <a class="el" href="group__zdma.html#gaf236c2323636d87ab0888b2d6f55a313">XZDma_Reset()</a>.</p>

</div>
</div>
<a class="anchor" id="ga7221416427c693436f444f4bf2d343ac"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XZDMA_HW_H_</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Prevent circular inclusions by using protection macros. </p>

</div>
</div>
<a class="anchor" id="ga3218611d01dec526018a6bd63dce603c"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XZDma_In32&#160;&#160;&#160;Xil_In32</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Input operation. </p>

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          <td class="memname">#define XZDMA_IXR_ALL_INTR_MASK&#160;&#160;&#160;(0x00000FFFU)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>IXR OR of all the interrupts mask. </p>

<p>Referenced by <a class="el" href="group__zdma.html#ga34c98a505b24c6e549ed7f746a82676e">XZDma_Enable()</a>, <a class="el" href="group__zdma.html#gaa5012fbb827d2330cae8cb90cafb388c">XZDma_IntrHandler()</a>, <a class="el" href="group__zdma.html#gaf236c2323636d87ab0888b2d6f55a313">XZDma_Reset()</a>, and <a class="el" href="xzdma__simple__example_8c.html#a378c4f0e9236ec692d7f32d7fe4220e7">XZDma_SimpleExample()</a>.</p>

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          <td class="memname">#define XZDMA_IXR_AXI_RD_DATA_MASK&#160;&#160;&#160;(0x00000100U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>IXR AXI read data error mask. </p>

<p>Referenced by <a class="el" href="group__zdma.html#gaa5012fbb827d2330cae8cb90cafb388c">XZDma_IntrHandler()</a>, and <a class="el" href="xzdma__simple__example_8c.html#a378c4f0e9236ec692d7f32d7fe4220e7">XZDma_SimpleExample()</a>.</p>

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          <td class="memname">#define XZDMA_IXR_AXI_RD_DST_DSCR_MASK&#160;&#160;&#160;(0x00000080U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>IXR AXI read descriptor error mask. </p>

<p>Referenced by <a class="el" href="group__zdma.html#gaa5012fbb827d2330cae8cb90cafb388c">XZDma_IntrHandler()</a>.</p>

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          <td class="memname">#define XZDMA_IXR_AXI_RD_SRC_DSCR_MASK&#160;&#160;&#160;(0x00000040U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>IXR AXI write descriptor error mask. </p>

<p>Referenced by <a class="el" href="group__zdma.html#gaa5012fbb827d2330cae8cb90cafb388c">XZDma_IntrHandler()</a>.</p>

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          <td class="memname">#define XZDMA_IXR_AXI_WR_DATA_MASK&#160;&#160;&#160;(0x00000200U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>IXR AXI write data error mask. </p>

<p>Referenced by <a class="el" href="group__zdma.html#gaa5012fbb827d2330cae8cb90cafb388c">XZDma_IntrHandler()</a>, and <a class="el" href="xzdma__simple__example_8c.html#a378c4f0e9236ec692d7f32d7fe4220e7">XZDma_SimpleExample()</a>.</p>

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          <td class="memname">#define XZDMA_IXR_BYTE_CNT_OVRFL_MASK&#160;&#160;&#160;(0x00000008U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>IXR byte count over flow mask. </p>

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          <td class="memname">#define XZDMA_IXR_DMA_DONE_MASK&#160;&#160;&#160;(0x00000400U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>IXR done mask. </p>

<p>Referenced by <a class="el" href="group__zdma.html#gaa5012fbb827d2330cae8cb90cafb388c">XZDma_IntrHandler()</a>, <a class="el" href="xzdma__linear__example_8c.html#a4d3f40edf2d265f5df9a045f27ba5ff5">XZDma_LinearExample()</a>, <a class="el" href="xzdma__linkedlist__example_8c.html#a4760deea4e054235c55a504187d96988">XZDma_LinkedListExample()</a>, <a class="el" href="xzdma__readonlymode__example_8c.html#a422668353271c6d61d0b749f6f7cd048">XZDma_SimpleReadOnlyExample()</a>, and <a class="el" href="xzdma__writeonlymode__example_8c.html#a18349b17c717df9dd089f5e9a3b465b9">XZDma_WriteOnlyExample()</a>.</p>

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          <td class="memname">#define XZDMA_IXR_DMA_PAUSE_MASK&#160;&#160;&#160;(0x00000800U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>IXR pause mask. </p>

<p>Referenced by <a class="el" href="group__zdma.html#gaa5012fbb827d2330cae8cb90cafb388c">XZDma_IntrHandler()</a>, and <a class="el" href="xzdma__linear__example_8c.html#a4d3f40edf2d265f5df9a045f27ba5ff5">XZDma_LinearExample()</a>.</p>

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          <td class="memname">#define XZDMA_IXR_DONE_MASK&#160;&#160;&#160;(0x00000400U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>IXR All done mask. </p>

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          <td class="memname">#define XZDMA_IXR_DST_ACCT_ERR_MASK&#160;&#160;&#160;(0x00000020U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>IXR DST interrupt count overflow mask. </p>

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          <td class="memname">#define XZDMA_IXR_DST_DSCR_DONE_MASK&#160;&#160;&#160;(0x00000004U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>IXR destination descriptor done mask. </p>

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          <td class="memname">#define XZDMA_IXR_ERR_MASK&#160;&#160;&#160;(0x00000BF9U)</td>
        </tr>
      </table>
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<p>IXR all Error mask. </p>
<p>Or of XZDMA_IXR_AXI_WR_DATA_MASK, XZDMA_IXR_AXI_RD_DATA_MASK, XZDMA_IXR_AXI_RD_DST_DSCR_MASK, XZDMA_IXR_AXI_RD_SRC_DSCR_MASK, XZDMA_IXR_INV_APB_MASK, XZDMA_IXR_DMA_PAUSE_MASK, XZDMA_IXR_BYTE_CNT_OVRFL_MASK, XZDMA_IXR_SRC_ACCT_ERR_MASK, XZDMA_IXR_DST_ACCT_ERR_MASK </p>

<p>Referenced by <a class="el" href="group__zdma.html#gaa5012fbb827d2330cae8cb90cafb388c">XZDma_IntrHandler()</a>.</p>

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          <td class="memname">#define XZDMA_IXR_INV_APB_MASK&#160;&#160;&#160;(0x00000001U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>IXR invalid APB access mask. </p>

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          <td class="memname">#define XZDMA_IXR_SRC_ACCT_ERR_MASK&#160;&#160;&#160;(0x00000010U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>IXR SRC interrupt count overflow mask. </p>

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<a class="anchor" id="ga7c2d94ea3ac539c290ef339a08e92e39"></a>
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          <td class="memname">#define XZDMA_IXR_SRC_DSCR_DONE_MASK&#160;&#160;&#160;(0x00000002U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>IXR source descriptor done mask. </p>

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          <td class="memname">#define XZDma_Out32&#160;&#160;&#160;Xil_Out32</td>
        </tr>
      </table>
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<p>Output operation. </p>

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          <td class="memname">#define XZDMA_PERIF_EN_MASK&#160;&#160;&#160;(0x00000001U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Peripheral flow control mask. </p>

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          <td class="memname">#define XZDMA_PERIF_PROG_CELL_CNT_MASK&#160;&#160;&#160;(0x0000003EU)</td>
        </tr>
      </table>
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<p>Peripheral program cell count. </p>

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          <td class="memname">#define XZDMA_PERIF_SIDE_MASK&#160;&#160;&#160;(0x00000002U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Interface attached the side mask. </p>

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          <td class="memname">#define XZDma_ReadReg</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">BaseAddress, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">RegOffset&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td>&#160;&#160;&#160;<a class="el" href="group__zdma.html#ga3218611d01dec526018a6bd63dce603c">XZDma_In32</a>((BaseAddress) + (u32)(RegOffset))</td>
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      </table>
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<p>This macro reads the given register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">BaseAddress</td><td>is the Xilinx base address of the ZDMA core. </td></tr>
    <tr><td class="paramname">RegOffset</td><td>is the register offset of the register.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The 32-bit value of the register.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-style signature: u32 <a class="el" href="group__zdma.html#gaf3bdd7a21f9d6add3ec23802122a7a85" title="This macro reads the given register. ">XZDma_ReadReg(u32 BaseAddress, u32 RegOffset)</a> </dd></dl>

<p>Referenced by <a class="el" href="group__zdma.html#gabbb337d990f31dc8932356f5abeb78bf">XZDma_ChannelState()</a>, <a class="el" href="group__zdma.html#ga7cb39835692353e5c34d95938b8ce8d0">XZDma_Resume()</a>, <a class="el" href="group__zdma.html#ga166edb355a4395294e7910c68f4840ca">XZDma_SelfTest()</a>, <a class="el" href="group__zdma.html#ga9f83e94a6ecae10b6bff851d76ffef24">XZDma_SetChDataConfig()</a>, and <a class="el" href="group__zdma.html#gaf1772f190fe0a67a17c78f5f23fc8024">XZDma_SetMode()</a>.</p>

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          <td class="memname">#define XZDMA_START_MSB_ADDR_MASK&#160;&#160;&#160;(0x0001FFFFU)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Start msb address mask. </p>

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          <td class="memname">#define XZDMA_STS_ALL_MASK&#160;&#160;&#160;(0x00000003U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>ZDMA status mask. </p>

<p>Referenced by <a class="el" href="group__zdma.html#gabbb337d990f31dc8932356f5abeb78bf">XZDma_ChannelState()</a>.</p>

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          <td class="memname">#define XZDMA_STS_BUSY_MASK&#160;&#160;&#160;(0x00000002U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>ZDMA is busy in transfer mask. </p>

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<a class="anchor" id="ga26a7f12c178d08cf180df3a77dfa04c6"></a>
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          <td class="memname">#define XZDMA_STS_DONE_ERR_MASK&#160;&#160;&#160;(0x00000003U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Done with errors mask. </p>

<p>Referenced by <a class="el" href="group__zdma.html#gabbb337d990f31dc8932356f5abeb78bf">XZDma_ChannelState()</a>.</p>

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<a class="anchor" id="ga98e3cde4448cc5bccfd0929889b78694"></a>
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          <td class="memname">#define XZDMA_STS_DONE_MASK&#160;&#160;&#160;(0x00000000U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>ZDMA done mask. </p>

<p>Referenced by <a class="el" href="group__zdma.html#gabbb337d990f31dc8932356f5abeb78bf">XZDma_ChannelState()</a>.</p>

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          <td class="memname">#define XZDMA_STS_PAUSE_MASK&#160;&#160;&#160;(0x00000001U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>ZDMA is in Pause state mask. </p>

<p>Referenced by <a class="el" href="group__zdma.html#gabbb337d990f31dc8932356f5abeb78bf">XZDma_ChannelState()</a>.</p>

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<a class="anchor" id="gad1af37520a9ff8f0b18ae5cb2af2f9f4"></a>
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          <td class="memname">#define XZDMA_WORD0_LSB_MASK&#160;&#160;&#160;(0xFFFFFFFFU)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>LSB Address mask. </p>

<p>Referenced by <a class="el" href="group__zdma.html#ga4e1c01839429d264c285bc7488b42fb8">XZDma_ScatterGather()</a>.</p>

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<div class="memproto">
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          <td class="memname">#define XZDMA_WORD1_MSB_MASK&#160;&#160;&#160;(0x0001FFFFU)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>MSB Address mask. </p>

<p>Referenced by <a class="el" href="group__zdma.html#ga4e1c01839429d264c285bc7488b42fb8">XZDma_ScatterGather()</a>.</p>

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<a class="anchor" id="ga055f4c7ad4789221cc57f6006e616d7f"></a>
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<div class="memproto">
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        <tr>
          <td class="memname">#define XZDMA_WORD1_MSB_SHIFT&#160;&#160;&#160;(32U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>MSB Address shift. </p>

<p>Referenced by <a class="el" href="group__zdma.html#ga4e1c01839429d264c285bc7488b42fb8">XZDma_ScatterGather()</a>.</p>

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<a class="anchor" id="ga806daa6c38fb4441e8031789784b89b3"></a>
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<div class="memproto">
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          <td class="memname">#define XZDMA_WORD2_SIZE_MASK&#160;&#160;&#160;(0x3FFFFFFFU)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Size mask. </p>

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<a class="anchor" id="ga8485f09f7b5e6c611b533862b4023860"></a>
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          <td class="memname">#define XZDMA_WORD3_CMD_MASK&#160;&#160;&#160;(0x00000018U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Cmd mask. </p>

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<a class="anchor" id="gacf5d8cf4ecff1be0f2dacfa5fb90c8d9"></a>
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          <td class="memname">#define XZDMA_WORD3_CMD_NXTVALID_MASK&#160;&#160;&#160;(0x00000000U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Next Dscr is valid mask. </p>

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<a class="anchor" id="ga68ef623af6d8fe3215167f134daae66c"></a>
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<div class="memproto">
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        <tr>
          <td class="memname">#define XZDMA_WORD3_CMD_PAUSE_MASK&#160;&#160;&#160;(0x00000008U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Pause after this dscr mask. </p>

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<a class="anchor" id="ga93e3bffa167d70e2f56c8e93d114d335"></a>
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        <tr>
          <td class="memname">#define XZDMA_WORD3_CMD_SHIFT&#160;&#160;&#160;(3U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Cmd shift. </p>

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<a class="anchor" id="ga0ec4db1fe53ded3ce7696e291b5188c2"></a>
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<div class="memproto">
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          <td class="memname">#define XZDMA_WORD3_CMD_STOP_MASK&#160;&#160;&#160;(0x00000010U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Stop after this ..* dscr mask. </p>

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<a class="anchor" id="gac2aeec8d3bc367ed78ec8a2436f780a7"></a>
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          <td class="memname">#define XZDMA_WORD3_COHRNT_MASK&#160;&#160;&#160;(0x00000001U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Coherence mask. </p>

<p>Referenced by <a class="el" href="group__zdma.html#gaf236c2323636d87ab0888b2d6f55a313">XZDma_Reset()</a>.</p>

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<a class="anchor" id="gaf7a5b80dbf16443b2f9b0247f7da946d"></a>
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          <td class="memname">#define XZDMA_WORD3_INTR_MASK&#160;&#160;&#160;(0x00000004U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Interrupt enable or disable mask. </p>

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<a class="anchor" id="ga482e905a7456e30f19e0a6b465e4f591"></a>
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          <td class="memname">#define XZDMA_WORD3_INTR_SHIFT&#160;&#160;&#160;(2U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Interrupt enable disable shift. </p>

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          <td class="memname">#define XZDMA_WORD3_TYPE_MASK&#160;&#160;&#160;(0x00000002U)</td>
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<p>Type of Descriptor mask. </p>

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          <td class="memname">#define XZDMA_WORD3_TYPE_SHIFT&#160;&#160;&#160;(1U)</td>
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<p>Type of Descriptor Shift. </p>

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          <td class="memname">#define XZDMA_WRITE_TO_CLEAR_MASK&#160;&#160;&#160;(0x00000000U)</td>
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<p>Write to clear mask. </p>

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          <td class="memname">#define XZDma_WriteReg</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">BaseAddress, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">RegOffset, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">Data&#160;</td>
        </tr>
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          <td></td>
          <td>)</td>
          <td></td><td>&#160;&#160;&#160;<a class="el" href="group__zdma.html#ga35a6987a4645af9cf6fc7463ca90f855">XZDma_Out32</a>(((BaseAddress) + (u32)(RegOffset)), (u32)(Data))</td>
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<p>This macro writes the value into the given register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">BaseAddress</td><td>is the Xilinx base address of the ZDMA core. </td></tr>
    <tr><td class="paramname">RegOffset</td><td>is the register offset of the register. </td></tr>
    <tr><td class="paramname">Data</td><td>is the 32-bit value to write to the register.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-style signature: void <a class="el" href="group__zdma.html#ga1fe52ea6cc149bd35296d497837eff5b" title="This macro writes the value into the given register. ">XZDma_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data)</a> </dd></dl>

<p>Referenced by <a class="el" href="group__zdma.html#ga34c98a505b24c6e549ed7f746a82676e">XZDma_Enable()</a>, <a class="el" href="group__zdma.html#gaf236c2323636d87ab0888b2d6f55a313">XZDma_Reset()</a>, <a class="el" href="group__zdma.html#ga7cb39835692353e5c34d95938b8ce8d0">XZDma_Resume()</a>, <a class="el" href="group__zdma.html#ga4e1c01839429d264c285bc7488b42fb8">XZDma_ScatterGather()</a>, <a class="el" href="group__zdma.html#ga166edb355a4395294e7910c68f4840ca">XZDma_SelfTest()</a>, <a class="el" href="group__zdma.html#ga9f83e94a6ecae10b6bff851d76ffef24">XZDma_SetChDataConfig()</a>, <a class="el" href="group__zdma.html#ga860cde1482bc78429ea5c6f1d3da9014">XZDma_SetChDscrConfig()</a>, <a class="el" href="group__zdma.html#gaf1772f190fe0a67a17c78f5f23fc8024">XZDma_SetMode()</a>, and <a class="el" href="group__zdma.html#ga15a0124d42f8ff48e54f32c1b643fe7b">XZDma_WOData()</a>.</p>

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<h2 class="groupheader">Enumeration Type Documentation</h2>
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          <td class="memname">enum <a class="el" href="group__zdma.html#ga37a3c751884020089469a54e242ff4cd">XZDma_Handler</a></td>
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<p>This typedef contains ZDMA Handler Types. </p>
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga37a3c751884020089469a54e242ff4cdaaffcfeb2b42f83e2654e1d58d609f0ab"></a>XZDMA_HANDLER_DONE</em>&nbsp;</td><td class="fielddoc">
<p>For Done Handler. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga37a3c751884020089469a54e242ff4cdafc560c87ab5657b331fb72c38c1ad83c"></a>XZDMA_HANDLER_ERROR</em>&nbsp;</td><td class="fielddoc">
<p>For Error Handler. </p>
</td></tr>
</table>

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<h2 class="groupheader">Function Documentation</h2>
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          <td class="memname">s32 XZDma_CfgInitialize </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_z_dma.html">XZDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_z_dma___config.html">XZDma_Config</a> *&#160;</td>
          <td class="paramname"><em>CfgPtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>EffectiveAddr</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function initializes an ZDMA core. </p>
<p>This function must be called prior to using an ZDMA core. Initialization of an ZDMA includes setting up the instance data and ensuring the hardware is in a quiescent state and resets all the hardware configurations.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_z_dma.html" title="The XZDma driver instance data structure. ">XZDma</a> instance. </td></tr>
    <tr><td class="paramname">CfgPtr</td><td>is a reference to a structure containing information about a specific <a class="el" href="struct_x_z_dma.html" title="The XZDma driver instance data structure. ">XZDma</a> instance. </td></tr>
    <tr><td class="paramname">EffectiveAddr</td><td>is the device base address in the virtual memory address space. The caller is responsible for keeping the address mapping from EffectiveAddr to the device physical base address unchanged once this function is invoked. Unexpected errors may occur if the address mapping changes after this function is called. If address translation is not used, pass in the physical address instead.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if initialization was successful.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_z_dma___config.html#a9be2f556ef1ee02397fb358f06aa5366">XZDma_Config::BaseAddress</a>, <a class="el" href="struct_x_z_dma.html#ae7cb358dd89da5287751442fd9a7fb53">XZDma::ChannelState</a>, <a class="el" href="struct_x_z_dma.html#a16d3eccbc976f6b61c7b83ac0df68f89">XZDma::Config</a>, <a class="el" href="struct_x_z_dma___config.html#af9e27510c4c528a88298f4880ef08669">XZDma_Config::DeviceId</a>, <a class="el" href="struct_x_z_dma___config.html#aaa2e5e405c0903647be81cb68f2f3542">XZDma_Config::DmaType</a>, <a class="el" href="struct_x_z_dma.html#a6ee062895bf6a06d28bb9aa2e118a11b">XZDma::DoneHandler</a>, <a class="el" href="struct_x_z_dma.html#ad507017674e5386e741e8e05d9415c98">XZDma::ErrorHandler</a>, <a class="el" href="struct_x_z_dma.html#a418f988cd455196d6127689c8e665da4">XZDma::IntrMask</a>, <a class="el" href="struct_x_z_dma.html#a0da5e708ed63a1daa9ef3931f27759ec">XZDma::irq_offset</a>, <a class="el" href="struct_x_z_dma___config.html#aa863829cef07a315b0beec01251918e1">XZDma_Config::IsCacheCoherent</a>, <a class="el" href="struct_x_z_dma.html#a11e560b15511ce0c1bea957659236f4a">XZDma::IsReady</a>, <a class="el" href="struct_x_z_dma.html#a1e4b5934b1b40ebc10ed5969bbc27c30">XZDma::IsSgDma</a>, <a class="el" href="struct_x_z_dma.html#a6ce36be06f13ecb70ac666bb3819e394">XZDma::Mode</a>, <a class="el" href="xzdma_8h.html#a19f8494063d56f2f39f9d40e6ded952aa598386ffccc9121fe927b5d761e0d07b">XZDMA_IDLE</a>, <a class="el" href="xzdma_8h.html#a84e5ba98d56dac2078e4bc68d5b5ab92acfd0a78e43b38febc3d4985a8b62efa5">XZDMA_NORMAL_MODE</a>, and <a class="el" href="group__zdma.html#gaf236c2323636d87ab0888b2d6f55a313">XZDma_Reset()</a>.</p>

<p>Referenced by <a class="el" href="xzdma__linear__example_8c.html#a4d3f40edf2d265f5df9a045f27ba5ff5">XZDma_LinearExample()</a>, <a class="el" href="xzdma__linkedlist__example_8c.html#a4760deea4e054235c55a504187d96988">XZDma_LinkedListExample()</a>, <a class="el" href="xzdma__selftest__example_8c.html#a138de341c9c3fb243c4ed39dfadf5785">XZDma_SelfTestExample()</a>, <a class="el" href="xzdma__simple__example_8c.html#a378c4f0e9236ec692d7f32d7fe4220e7">XZDma_SimpleExample()</a>, <a class="el" href="xzdma__readonlymode__example_8c.html#a422668353271c6d61d0b749f6f7cd048">XZDma_SimpleReadOnlyExample()</a>, and <a class="el" href="xzdma__writeonlymode__example_8c.html#a18349b17c717df9dd089f5e9a3b465b9">XZDma_WriteOnlyExample()</a>.</p>

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          <td class="memname"><a class="el" href="xzdma_8h.html#a19f8494063d56f2f39f9d40e6ded952a">XZDmaState</a> XZDma_ChannelState </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_z_dma.html">XZDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
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<p>This function returns the state of ZDMA core. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_z_dma.html" title="The XZDma driver instance data structure. ">XZDma</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>This function returns state of ZDMA core<ul>
<li>XZDMA_IDLE - If ZDMA core is in idle state.</li>
<li>XZDMA_PAUSE - If ZDMA is in paused state.</li>
<li>XZDMA_BUSY - If ZDMA is in busy state. </li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. C-style signature: XZDmaState <a class="el" href="group__zdma.html#gabbb337d990f31dc8932356f5abeb78bf" title="This function returns the state of ZDMA core. ">XZDma_ChannelState(XZDma *InstancePtr)</a> </dd></dl>

<p>References <a class="el" href="struct_x_z_dma___config.html#a9be2f556ef1ee02397fb358f06aa5366">XZDma_Config::BaseAddress</a>, <a class="el" href="struct_x_z_dma.html#a16d3eccbc976f6b61c7b83ac0df68f89">XZDma::Config</a>, <a class="el" href="xzdma_8h.html#a19f8494063d56f2f39f9d40e6ded952aac7f53a5b63f7f73793a60c5213c695df">XZDMA_BUSY</a>, <a class="el" href="xzdma_8h.html#a19f8494063d56f2f39f9d40e6ded952aa598386ffccc9121fe927b5d761e0d07b">XZDMA_IDLE</a>, <a class="el" href="xzdma_8h.html#a19f8494063d56f2f39f9d40e6ded952aadce3cf4581ae7112ecb82e47127e7202">XZDMA_PAUSE</a>, <a class="el" href="group__zdma.html#gaf3bdd7a21f9d6add3ec23802122a7a85">XZDma_ReadReg</a>, <a class="el" href="group__zdma.html#gad241ee38734a72209dee1fdd21cf573f">XZDMA_STS_ALL_MASK</a>, <a class="el" href="group__zdma.html#ga26a7f12c178d08cf180df3a77dfa04c6">XZDMA_STS_DONE_ERR_MASK</a>, <a class="el" href="group__zdma.html#ga98e3cde4448cc5bccfd0929889b78694">XZDMA_STS_DONE_MASK</a>, and <a class="el" href="group__zdma.html#gad902db953958b9834264c8f6801b0b27">XZDMA_STS_PAUSE_MASK</a>.</p>

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          <td class="memname">u32 XZDma_CreateBDList </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_z_dma.html">XZDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="xzdma_8h.html#a8deecd1bc1f130b591748afb1790a013">XZDma_DscrType</a>&#160;</td>
          <td class="paramname"><em>TypeOfDscr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">UINTPTR&#160;</td>
          <td class="paramname"><em>Dscr_MemPtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>NoOfBytes</em>&#160;</td>
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        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
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<p>This function sets the descriptor type and descriptor pointer's start address of both source and destination based on the memory allocated by user and also calculates no of descriptors(BDs) can be created in the allocated memory. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_z_dma.html" title="The XZDma driver instance data structure. ">XZDma</a> instance. </td></tr>
    <tr><td class="paramname">TypeOfDscr</td><td>is a variable which specifies descriptor type whether Linear or linked list type of descriptor.<ul>
<li>XZDMA_LINEAR - Linear type of descriptor.</li>
<li>XZDMA_LINKEDLIST- Linked list type of descriptor. </li>
</ul>
</td></tr>
    <tr><td class="paramname">Dscr_MemPtr</td><td>is a pointer to the allocated memory for creating descriptors. It Should be aligned to 64 bytes.</td></tr>
    <tr><td class="paramname">NoOfBytes</td><td>specifies the number of bytes allocated for descriptors</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The Count of the descriptors can be created.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>User should allocate the memory for descriptors which should be capable of how many transfers he wish to do in one start. For Linear mode each descriptor needs 128 bit memory so for one data transfer it requires 2*128 = 256 bits i.e. 32 bytes Similarly for Linked list mode for each descriptor it needs 256 bit, so for one data transfer it require 2*256 = 512 bits i.e. 64 bytes. </dd></dl>

<p>References <a class="el" href="struct_x_z_dma.html#a16d3eccbc976f6b61c7b83ac0df68f89">XZDma::Config</a>, <a class="el" href="struct_x_z_dma.html#a5bd448e43cadd065021bfe03ec8bcd4b">XZDma::Descriptor</a>, <a class="el" href="struct_x_z_dma___descriptor.html#a79a3a960fa2f970881929a7fe8e3c6e6">XZDma_Descriptor::DscrCount</a>, <a class="el" href="struct_x_z_dma___descriptor.html#aa8747f4ea5ab6059bf7ccc85a74abf03">XZDma_Descriptor::DscrType</a>, <a class="el" href="struct_x_z_dma___descriptor.html#a0af3889a9a8bffce7a1b088b33f3af30">XZDma_Descriptor::DstDscrPtr</a>, <a class="el" href="struct_x_z_dma___config.html#aa863829cef07a315b0beec01251918e1">XZDma_Config::IsCacheCoherent</a>, <a class="el" href="struct_x_z_dma___descriptor.html#ae8918b981bd473e3512f03e7a5156b63">XZDma_Descriptor::SrcDscrPtr</a>, <a class="el" href="xzdma_8h.html#a8deecd1bc1f130b591748afb1790a013aa5faec59ce5ba9d1875de52ecff6fb09">XZDMA_LINEAR</a>, and <a class="el" href="xzdma_8h.html#a8deecd1bc1f130b591748afb1790a013ac4b925288997818ea5ce2be83f8cbfba">XZDMA_LINKEDLIST</a>.</p>

<p>Referenced by <a class="el" href="xzdma__linear__example_8c.html#a4d3f40edf2d265f5df9a045f27ba5ff5">XZDma_LinearExample()</a>, and <a class="el" href="xzdma__linkedlist__example_8c.html#a4760deea4e054235c55a504187d96988">XZDma_LinkedListExample()</a>.</p>

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          <td class="memname">void XZDma_Enable </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_z_dma.html">XZDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
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<p>This function enables all the interrupts which user intended to enable and enables the ZDMA channel for initiating data transfer. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_z_dma.html" title="The XZDma driver instance data structure. ">XZDma</a> instance. </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_z_dma___config.html#a9be2f556ef1ee02397fb358f06aa5366">XZDma_Config::BaseAddress</a>, <a class="el" href="struct_x_z_dma.html#ae7cb358dd89da5287751442fd9a7fb53">XZDma::ChannelState</a>, <a class="el" href="struct_x_z_dma.html#a16d3eccbc976f6b61c7b83ac0df68f89">XZDma::Config</a>, <a class="el" href="struct_x_z_dma.html#a418f988cd455196d6127689c8e665da4">XZDma::IntrMask</a>, <a class="el" href="xzdma_8h.html#a19f8494063d56f2f39f9d40e6ded952aac7f53a5b63f7f73793a60c5213c695df">XZDMA_BUSY</a>, <a class="el" href="xzdma_8h.html#aa521711575261553f4a6d65eece92d61">XZDma_EnableCh</a>, <a class="el" href="group__zdma.html#gad82b072a8c2cc4c5e32fc43e9822e634">XZDMA_IXR_ALL_INTR_MASK</a>, and <a class="el" href="group__zdma.html#ga1fe52ea6cc149bd35296d497837eff5b">XZDma_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__zdma.html#ga70f7466e97aae2126181727774f6e6bb">XZDma_Start()</a>.</p>

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          <td class="memname">void XZDma_GetChDataConfig </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_z_dma.html">XZDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_z_dma___data_config.html">XZDma_DataConfig</a> *&#160;</td>
          <td class="paramname"><em>Configure</em>&#160;</td>
        </tr>
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          <td>)</td>
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<p>This function gets the data attributes and control configurations of a ZDMA core. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_z_dma.html" title="The XZDma driver instance data structure. ">XZDma</a> instance. </td></tr>
    <tr><td class="paramname">Configure</td><td>is a pointer to the XZDma_ChDataConfig structure which has all the configuration fields. The fields of the structure are:<ul>
<li>OverFetch - Allows over fetch or not<ul>
<li>0 - Not allowed to over-fetch on SRC</li>
<li>1 - Allowed to over-fetch on SRC</li>
</ul>
</li>
<li>SrcIssue - Outstanding transaction on SRC<ul>
<li>Range is 1 to 32</li>
</ul>
</li>
<li>SrcBurstType - Burst Type for SRC AXI transaction<ul>
<li>XZDMA_FIXED_BURST - Fixed burst</li>
<li>XZDMA_INCR_BURST - Incremental burst</li>
</ul>
</li>
<li>SrcBurstLen - AXI Length for Data Read.<ul>
<li>Can be max of 16 to be compatible with AXI3</li>
</ul>
</li>
<li>DstBurstType - Burst Type for SRC AXI transaction<ul>
<li>XZDMA_FIXED_BURST - Fixed burst</li>
<li>XZDMA_INCR_BURST - Incremental burst</li>
</ul>
</li>
<li>DstBurstLen - AXI Length for Data write.<ul>
<li>Can be max of 16 to be compatible with AXI3</li>
</ul>
</li>
<li>SrcCache - AXI cache bits for Data read</li>
<li>SrcQos - Configurable QoS bits for AXI Data read</li>
<li>DstCache - AXI cache bits for Data write</li>
<li>DstQos - Configurable QoS bits for AXI Data write</li>
</ul>
</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_z_dma.html#ace8acb1e903931b38a9f6393cfca5f51">XZDma::DataConfig</a>, <a class="el" href="struct_x_z_dma___data_config.html#a7510617151cb03fbefdc1ae1701e0263">XZDma_DataConfig::DstBurstLen</a>, <a class="el" href="struct_x_z_dma___data_config.html#a539b42c423c5275626455a5ec02b9b86">XZDma_DataConfig::DstBurstType</a>, <a class="el" href="struct_x_z_dma___data_config.html#af222d9922f6197ac0cd076e9c7dbc31a">XZDma_DataConfig::DstCache</a>, <a class="el" href="struct_x_z_dma___data_config.html#a40c90389c27c6d94de05e39e5cee64e7">XZDma_DataConfig::DstQos</a>, <a class="el" href="struct_x_z_dma___data_config.html#af6657e43d38da393e1676477d81449b7">XZDma_DataConfig::OverFetch</a>, <a class="el" href="struct_x_z_dma___data_config.html#a3c1367c6570b09c6fb40b870f07fd792">XZDma_DataConfig::SrcBurstLen</a>, <a class="el" href="struct_x_z_dma___data_config.html#a946a5d7a1367df277236f3aa5941ac02">XZDma_DataConfig::SrcBurstType</a>, <a class="el" href="struct_x_z_dma___data_config.html#aad59bcf9b6125e7b663e4c824a0d5349">XZDma_DataConfig::SrcCache</a>, <a class="el" href="struct_x_z_dma___data_config.html#a5072d085f2cbdc54f1e12f943dc2ee14">XZDma_DataConfig::SrcIssue</a>, and <a class="el" href="struct_x_z_dma___data_config.html#ac5dc5f4360b7b593e3e946ad05af5e8f">XZDma_DataConfig::SrcQos</a>.</p>

<p>Referenced by <a class="el" href="xzdma__linear__example_8c.html#a4d3f40edf2d265f5df9a045f27ba5ff5">XZDma_LinearExample()</a>, and <a class="el" href="xzdma__linkedlist__example_8c.html#a4760deea4e054235c55a504187d96988">XZDma_LinkedListExample()</a>.</p>

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          <td class="memname">void XZDma_GetChDscrConfig </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_z_dma.html">XZDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_z_dma___dscr_config.html">XZDma_DscrConfig</a> *&#160;</td>
          <td class="paramname"><em>Configure</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function gets the descriptor attributes of the channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_z_dma.html" title="The XZDma driver instance data structure. ">XZDma</a> instance. </td></tr>
    <tr><td class="paramname">Configure</td><td>is a pointer to the XZDma_ChDscrConfig structure which has all the configuration fields. The fields of the structure are:<ul>
<li>AxCoherent - AXI transactions generated for the descriptor.<ul>
<li>0 - Non coherent</li>
<li>1 - Coherent</li>
</ul>
</li>
<li>AXCache - AXI cache bit used for DSCR fetch (both on SRC and DST Side)</li>
<li>AXQos - QoS bit used for DSCR fetch (both on SRC and DST Side)</li>
</ul>
</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_z_dma___dscr_config.html#ad38367e530b5b2331cb1d487e41f11a8">XZDma_DscrConfig::AXCache</a>, <a class="el" href="struct_x_z_dma___dscr_config.html#abf4ec728c1ad271759ed0b4ecc82caae">XZDma_DscrConfig::AxCoherent</a>, <a class="el" href="struct_x_z_dma___dscr_config.html#af63f7a189b00292faa23b6d11c7a3903">XZDma_DscrConfig::AXQos</a>, and <a class="el" href="struct_x_z_dma.html#a7c98e315d4533b69b0add5bbf21e2954">XZDma::DscrConfig</a>.</p>

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          <td class="memname">void XZDma_IntrHandler </td>
          <td>(</td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>Instance</em></td><td>)</td>
          <td></td>
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<p>This function is the interrupt handler for the ZDMA core. </p>
<p>This handler reads the pending interrupt from Status register, determines the source of the interrupts and calls the respective callbacks for the interrupts that are enabled in IRQ_ENABLE register, and finally clears the interrupts.</p>
<p>The application is responsible for connecting this function to the interrupt system. Application beyond this driver is also responsible for providing callbacks to handle interrupts and installing the callbacks using <a class="el" href="group__zdma.html#ga78a9c500b9c87963f7695fc5edf87a21" title="This routine installs an asynchronous callback function for the given HandlerType. ">XZDma_SetCallBack()</a> during initialization phase. .</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">Instance</td><td>is a pointer to the <a class="el" href="struct_x_z_dma.html" title="The XZDma driver instance data structure. ">XZDma</a> instance to be worked on.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>To generate interrupt required interrupts should be enabled. </dd></dl>

<p>References <a class="el" href="struct_x_z_dma.html#ae7cb358dd89da5287751442fd9a7fb53">XZDma::ChannelState</a>, <a class="el" href="struct_x_z_dma.html#a6ee062895bf6a06d28bb9aa2e118a11b">XZDma::DoneHandler</a>, <a class="el" href="struct_x_z_dma.html#af216f69d108160949a9f319929d64727">XZDma::DoneRef</a>, <a class="el" href="struct_x_z_dma.html#ad507017674e5386e741e8e05d9415c98">XZDma::ErrorHandler</a>, <a class="el" href="struct_x_z_dma.html#aeb05d269e323ab52e9dd37fce46ad807">XZDma::ErrorRef</a>, <a class="el" href="xzdma_8h.html#aaf5bc66296248406b7fa1a85e736e7f5">XZDma_DisableIntr</a>, <a class="el" href="xzdma_8h.html#a2c7e211a1e57e96c48039753506ababe">XZDma_GetIntrMask</a>, <a class="el" href="xzdma_8h.html#a19f8494063d56f2f39f9d40e6ded952aa598386ffccc9121fe927b5d761e0d07b">XZDMA_IDLE</a>, <a class="el" href="xzdma_8h.html#a01dcc0932c4566c5efeefd0b781fea01">XZDma_IntrClear</a>, <a class="el" href="xzdma_8h.html#a9d60ab769eea32f66b28c1a63c2d23cf">XZDma_IntrGetStatus</a>, <a class="el" href="group__zdma.html#gad82b072a8c2cc4c5e32fc43e9822e634">XZDMA_IXR_ALL_INTR_MASK</a>, <a class="el" href="group__zdma.html#gae24332b4ced51e3a17de66e87f508e72">XZDMA_IXR_AXI_RD_DATA_MASK</a>, <a class="el" href="group__zdma.html#ga508df1ddb568661acbe7eb02addd91aa">XZDMA_IXR_AXI_RD_DST_DSCR_MASK</a>, <a class="el" href="group__zdma.html#gaa616129e7e1d450c57a45518c883a4b0">XZDMA_IXR_AXI_RD_SRC_DSCR_MASK</a>, <a class="el" href="group__zdma.html#gaf54288858bd030f724d9939416975778">XZDMA_IXR_AXI_WR_DATA_MASK</a>, <a class="el" href="group__zdma.html#ga3427b844ce3c78c2e203cbe632ce8d11">XZDMA_IXR_DMA_DONE_MASK</a>, <a class="el" href="group__zdma.html#ga749957c47c3d65c99861579af039b5db">XZDMA_IXR_DMA_PAUSE_MASK</a>, <a class="el" href="group__zdma.html#gaf2a5aa7481789b82f9a68ddbb803b072">XZDMA_IXR_ERR_MASK</a>, and <a class="el" href="xzdma_8h.html#a19f8494063d56f2f39f9d40e6ded952aadce3cf4581ae7112ecb82e47127e7202">XZDMA_PAUSE</a>.</p>

<p>Referenced by <a class="el" href="xzdma__linear__example_8c.html#a4d3f40edf2d265f5df9a045f27ba5ff5">XZDma_LinearExample()</a>, <a class="el" href="xzdma__linkedlist__example_8c.html#a4760deea4e054235c55a504187d96988">XZDma_LinkedListExample()</a>, <a class="el" href="xzdma__simple__example_8c.html#a378c4f0e9236ec692d7f32d7fe4220e7">XZDma_SimpleExample()</a>, <a class="el" href="xzdma__readonlymode__example_8c.html#a422668353271c6d61d0b749f6f7cd048">XZDma_SimpleReadOnlyExample()</a>, and <a class="el" href="xzdma__writeonlymode__example_8c.html#a18349b17c717df9dd089f5e9a3b465b9">XZDma_WriteOnlyExample()</a>.</p>

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          <td class="memname"><a class="el" href="struct_x_z_dma___config.html">XZDma_Config</a>* XZDma_LookupConfig </td>
          <td>(</td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>DeviceId</em></td><td>)</td>
          <td></td>
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<p>XZDma_LookupConfig returns a reference to an <a class="el" href="struct_x_z_dma___config.html" title="This typedef contains configuration information for a ZDMA core Each ZDMA core should have a configur...">XZDma_Config</a> structure based on the unique device id, <em>DeviceId</em>. </p>
<p>The return value will refer to an entry in the device configuration table defined in the xzdma_g.c file.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">DeviceId</td><td>is the unique device ID of the device for the lookup operation.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>CfgPtr is a reference to a config record in the configuration table (in xzdma_g.c) corresponding to <em>DeviceId</em>, or NULL if no match is found.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>Referenced by <a class="el" href="xzdma__linear__example_8c.html#a4d3f40edf2d265f5df9a045f27ba5ff5">XZDma_LinearExample()</a>, <a class="el" href="xzdma__linkedlist__example_8c.html#a4760deea4e054235c55a504187d96988">XZDma_LinkedListExample()</a>, <a class="el" href="xzdma__selftest__example_8c.html#a138de341c9c3fb243c4ed39dfadf5785">XZDma_SelfTestExample()</a>, <a class="el" href="xzdma__simple__example_8c.html#a378c4f0e9236ec692d7f32d7fe4220e7">XZDma_SimpleExample()</a>, <a class="el" href="xzdma__readonlymode__example_8c.html#a422668353271c6d61d0b749f6f7cd048">XZDma_SimpleReadOnlyExample()</a>, and <a class="el" href="xzdma__writeonlymode__example_8c.html#a18349b17c717df9dd089f5e9a3b465b9">XZDma_WriteOnlyExample()</a>.</p>

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          <td class="memname">void XZDma_Reset </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_z_dma.html">XZDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
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<p>This function resets the ZDMA core. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_z_dma.html" title="The XZDma driver instance data structure. ">XZDma</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>This function resets all the configurations made previously. Disables all the interrupts and clears interrupt status. </dd></dl>

<p>References <a class="el" href="struct_x_z_dma___config.html#a9be2f556ef1ee02397fb358f06aa5366">XZDma_Config::BaseAddress</a>, <a class="el" href="struct_x_z_dma.html#ae7cb358dd89da5287751442fd9a7fb53">XZDma::ChannelState</a>, <a class="el" href="struct_x_z_dma.html#a16d3eccbc976f6b61c7b83ac0df68f89">XZDma::Config</a>, <a class="el" href="struct_x_z_dma.html#a418f988cd455196d6127689c8e665da4">XZDma::IntrMask</a>, <a class="el" href="struct_x_z_dma___config.html#aa863829cef07a315b0beec01251918e1">XZDma_Config::IsCacheCoherent</a>, <a class="el" href="group__zdma.html#gac4e0bd4cf99586a764ac52fdd43c4a0c">XZDMA_CH_WR_ONLY_RESET_VALUE</a>, <a class="el" href="group__zdma.html#gadb99cf87cd8081ab8195fafb44005d8d">XZDMA_CTRL0_RESET_VALUE</a>, <a class="el" href="group__zdma.html#gad1a614229d720d8abc65e98bba16def8">XZDMA_CTRL1_RESET_VALUE</a>, <a class="el" href="group__zdma.html#ga6fc39f50cddb793d1ffa51bf3b36e471">XZDMA_DATA_ATTR_RESET_VALUE</a>, <a class="el" href="xzdma_8h.html#abb977b875b07151264f4a70527052885">XZDma_DisableCh</a>, <a class="el" href="xzdma_8h.html#aaf5bc66296248406b7fa1a85e736e7f5">XZDma_DisableIntr</a>, <a class="el" href="group__zdma.html#gacf85276abd3537f849cb9279861570a4">XZDMA_DSCR_ATTR_AXCOHRNT_SHIFT</a>, <a class="el" href="group__zdma.html#gaeb9a7bdb3c0b6be0adf689c98e0526c3">XZDMA_DSCR_ATTR_RESET_VALUE</a>, <a class="el" href="xzdma_8h.html#a20da79b41cec32ba5729c7208359a66d">XZDma_GetDstIntrCnt</a>, <a class="el" href="xzdma_8h.html#a53b741795f9b65cc29b1a8f7e5e15f9f">XZDma_GetSrcIntrCnt</a>, <a class="el" href="xzdma_8h.html#a19f8494063d56f2f39f9d40e6ded952aa598386ffccc9121fe927b5d761e0d07b">XZDMA_IDLE</a>, <a class="el" href="xzdma_8h.html#a01dcc0932c4566c5efeefd0b781fea01">XZDma_IntrClear</a>, <a class="el" href="group__zdma.html#gad82b072a8c2cc4c5e32fc43e9822e634">XZDMA_IXR_ALL_INTR_MASK</a>, <a class="el" href="xzdma_8h.html#aef935a114c847da7e5014be2f2237b79">XZDma_TotalByteClear</a>, <a class="el" href="group__zdma.html#gac2aeec8d3bc367ed78ec8a2436f780a7">XZDMA_WORD3_COHRNT_MASK</a>, and <a class="el" href="group__zdma.html#ga1fe52ea6cc149bd35296d497837eff5b">XZDma_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__zdma.html#gad882e6d7430871e5b71643c8be2512d5">XZDma_CfgInitialize()</a>, <a class="el" href="xzdma__linear__example_8c.html#a4d3f40edf2d265f5df9a045f27ba5ff5">XZDma_LinearExample()</a>, <a class="el" href="xzdma__linkedlist__example_8c.html#a4760deea4e054235c55a504187d96988">XZDma_LinkedListExample()</a>, <a class="el" href="xzdma__simple__example_8c.html#a378c4f0e9236ec692d7f32d7fe4220e7">XZDma_SimpleExample()</a>, and <a class="el" href="xzdma__writeonlymode__example_8c.html#a18349b17c717df9dd089f5e9a3b465b9">XZDma_WriteOnlyExample()</a>.</p>

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          <td class="memname">void XZDma_Resume </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_z_dma.html">XZDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function resume the paused state of ZDMA core and starts the transfer from where it has paused. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_z_dma.html" title="The XZDma driver instance data structure. ">XZDma</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>Valid only for scatter gather mode. </dd></dl>

<p>References <a class="el" href="struct_x_z_dma___config.html#a9be2f556ef1ee02397fb358f06aa5366">XZDma_Config::BaseAddress</a>, <a class="el" href="struct_x_z_dma.html#ae7cb358dd89da5287751442fd9a7fb53">XZDma::ChannelState</a>, <a class="el" href="struct_x_z_dma.html#a16d3eccbc976f6b61c7b83ac0df68f89">XZDma::Config</a>, <a class="el" href="struct_x_z_dma.html#a1e4b5934b1b40ebc10ed5969bbc27c30">XZDma::IsSgDma</a>, <a class="el" href="xzdma_8h.html#a19f8494063d56f2f39f9d40e6ded952aac7f53a5b63f7f73793a60c5213c695df">XZDMA_BUSY</a>, <a class="el" href="group__zdma.html#ga7eca536c9dac7c46bb03eadd6a391402">XZDMA_CTRL0_CONT_ADDR_MASK</a>, <a class="el" href="group__zdma.html#gaa10c98a9560919004f43cbcbe665b5b3">XZDMA_CTRL0_CONT_MASK</a>, <a class="el" href="xzdma_8h.html#a19f8494063d56f2f39f9d40e6ded952aadce3cf4581ae7112ecb82e47127e7202">XZDMA_PAUSE</a>, <a class="el" href="group__zdma.html#gaf3bdd7a21f9d6add3ec23802122a7a85">XZDma_ReadReg</a>, and <a class="el" href="group__zdma.html#ga1fe52ea6cc149bd35296d497837eff5b">XZDma_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xzdma__linear__example_8c.html#a4d3f40edf2d265f5df9a045f27ba5ff5">XZDma_LinearExample()</a>.</p>

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          <td class="memname">void XZDma_ScatterGather </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_z_dma.html">XZDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_z_dma___transfer.html">XZDma_Transfer</a> *&#160;</td>
          <td class="paramname"><em>Data</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Num</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function sets all the required fields for initiating data transfer in scatter gather mode. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_z_dma.html" title="The XZDma driver instance data structure. ">XZDma</a> instance. </td></tr>
    <tr><td class="paramname">Data</td><td>is a pointer of array to the <a class="el" href="struct_x_z_dma___transfer.html" title="This typedef contains the fields for transfer of data. ">XZDma_Transfer</a> structure which has all the configuration fields for initiating data transfer. </td></tr>
    <tr><td class="paramname">Num</td><td>specifies number of array elements of Data pointer.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_z_dma___config.html#a9be2f556ef1ee02397fb358f06aa5366">XZDma_Config::BaseAddress</a>, <a class="el" href="struct_x_z_dma.html#a16d3eccbc976f6b61c7b83ac0df68f89">XZDma::Config</a>, <a class="el" href="struct_x_z_dma.html#a5bd448e43cadd065021bfe03ec8bcd4b">XZDma::Descriptor</a>, <a class="el" href="struct_x_z_dma___descriptor.html#aa8747f4ea5ab6059bf7ccc85a74abf03">XZDma_Descriptor::DscrType</a>, <a class="el" href="struct_x_z_dma___descriptor.html#a0af3889a9a8bffce7a1b088b33f3af30">XZDma_Descriptor::DstDscrPtr</a>, <a class="el" href="struct_x_z_dma___descriptor.html#ae8918b981bd473e3512f03e7a5156b63">XZDma_Descriptor::SrcDscrPtr</a>, <a class="el" href="xzdma_8h.html#a8deecd1bc1f130b591748afb1790a013aa5faec59ce5ba9d1875de52ecff6fb09">XZDMA_LINEAR</a>, <a class="el" href="group__zdma.html#gad1af37520a9ff8f0b18ae5cb2af2f9f4">XZDMA_WORD0_LSB_MASK</a>, <a class="el" href="group__zdma.html#gac8bb93895e5f91a7c3133e1cf3f51cf0">XZDMA_WORD1_MSB_MASK</a>, <a class="el" href="group__zdma.html#ga055f4c7ad4789221cc57f6006e616d7f">XZDMA_WORD1_MSB_SHIFT</a>, and <a class="el" href="group__zdma.html#ga1fe52ea6cc149bd35296d497837eff5b">XZDma_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__zdma.html#ga70f7466e97aae2126181727774f6e6bb">XZDma_Start()</a>.</p>

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          <td class="memname">s32 XZDma_SelfTest </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_z_dma.html">XZDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
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<p>This file contains a diagnostic self-test function for the ZDMA driver. </p>
<p>Refer to the header file <a class="el" href="xzdma_8h.html">xzdma.h</a> for more detailed information.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to <a class="el" href="struct_x_z_dma.html" title="The XZDma driver instance data structure. ">XZDma</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if the test is successful.</li>
<li>XST_FAILURE if the test is failed.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_z_dma___config.html#a9be2f556ef1ee02397fb358f06aa5366">XZDma_Config::BaseAddress</a>, <a class="el" href="struct_x_z_dma.html#a16d3eccbc976f6b61c7b83ac0df68f89">XZDma::Config</a>, <a class="el" href="group__zdma.html#gac02824ee188615e27684eaea248c33eb">XZDMA_CTRL0_OVR_FETCH_MASK</a>, <a class="el" href="group__zdma.html#gaf3bdd7a21f9d6add3ec23802122a7a85">XZDma_ReadReg</a>, and <a class="el" href="group__zdma.html#ga1fe52ea6cc149bd35296d497837eff5b">XZDma_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xzdma__linear__example_8c.html#a4d3f40edf2d265f5df9a045f27ba5ff5">XZDma_LinearExample()</a>, <a class="el" href="xzdma__linkedlist__example_8c.html#a4760deea4e054235c55a504187d96988">XZDma_LinkedListExample()</a>, <a class="el" href="xzdma__selftest__example_8c.html#a138de341c9c3fb243c4ed39dfadf5785">XZDma_SelfTestExample()</a>, <a class="el" href="xzdma__simple__example_8c.html#a378c4f0e9236ec692d7f32d7fe4220e7">XZDma_SimpleExample()</a>, <a class="el" href="xzdma__readonlymode__example_8c.html#a422668353271c6d61d0b749f6f7cd048">XZDma_SimpleReadOnlyExample()</a>, and <a class="el" href="xzdma__writeonlymode__example_8c.html#a18349b17c717df9dd089f5e9a3b465b9">XZDma_WriteOnlyExample()</a>.</p>

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          <td class="memname">s32 XZDma_SetCallBack </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_z_dma.html">XZDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__zdma.html#ga37a3c751884020089469a54e242ff4cd">XZDma_Handler</a>&#160;</td>
          <td class="paramname"><em>HandlerType</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>CallBackFunc</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>CallBackRef</em>&#160;</td>
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        <tr>
          <td></td>
          <td>)</td>
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<p>This routine installs an asynchronous callback function for the given HandlerType. </p>
<pre>
HandlerType              Callback Function Type
-----------------------  --------------------------------------------------
XZDMA_HANDLER_DONE         Done handler
XZDMA_HANDLER_ERROR        Error handler</pre><pre></pre><dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_z_dma.html" title="The XZDma driver instance data structure. ">XZDma</a> instance to be worked on. </td></tr>
    <tr><td class="paramname">HandlerType</td><td>specifies which callback is to be attached. </td></tr>
    <tr><td class="paramname">CallBackFunc</td><td>is the address of the callback function. </td></tr>
    <tr><td class="paramname">CallBackRef</td><td>is a user data item that will be passed to the callback function when it is invoked.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS when handler is installed.</li>
<li>XST_INVALID_PARAM when HandlerType is invalid.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>Invoking this function for a handler that already has been installed replaces it with the new handler. </dd></dl>

<p>References <a class="el" href="struct_x_z_dma.html#a6ee062895bf6a06d28bb9aa2e118a11b">XZDma::DoneHandler</a>, <a class="el" href="struct_x_z_dma.html#af216f69d108160949a9f319929d64727">XZDma::DoneRef</a>, <a class="el" href="struct_x_z_dma.html#ad507017674e5386e741e8e05d9415c98">XZDma::ErrorHandler</a>, <a class="el" href="struct_x_z_dma.html#aeb05d269e323ab52e9dd37fce46ad807">XZDma::ErrorRef</a>, <a class="el" href="struct_x_z_dma.html#a11e560b15511ce0c1bea957659236f4a">XZDma::IsReady</a>, <a class="el" href="group__zdma.html#gga37a3c751884020089469a54e242ff4cdaaffcfeb2b42f83e2654e1d58d609f0ab">XZDMA_HANDLER_DONE</a>, and <a class="el" href="group__zdma.html#gga37a3c751884020089469a54e242ff4cdafc560c87ab5657b331fb72c38c1ad83c">XZDMA_HANDLER_ERROR</a>.</p>

<p>Referenced by <a class="el" href="xzdma__linear__example_8c.html#a4d3f40edf2d265f5df9a045f27ba5ff5">XZDma_LinearExample()</a>, <a class="el" href="xzdma__linkedlist__example_8c.html#a4760deea4e054235c55a504187d96988">XZDma_LinkedListExample()</a>, <a class="el" href="xzdma__simple__example_8c.html#a378c4f0e9236ec692d7f32d7fe4220e7">XZDma_SimpleExample()</a>, <a class="el" href="xzdma__readonlymode__example_8c.html#a422668353271c6d61d0b749f6f7cd048">XZDma_SimpleReadOnlyExample()</a>, and <a class="el" href="xzdma__writeonlymode__example_8c.html#a18349b17c717df9dd089f5e9a3b465b9">XZDma_WriteOnlyExample()</a>.</p>

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          <td class="memname">s32 XZDma_SetChDataConfig </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_z_dma.html">XZDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_z_dma___data_config.html">XZDma_DataConfig</a> *&#160;</td>
          <td class="paramname"><em>Configure</em>&#160;</td>
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          <td>)</td>
          <td></td><td></td>
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<p>This function sets the data attributes and control configurations of a ZDMA core based on the inputs provided. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_z_dma.html" title="The XZDma driver instance data structure. ">XZDma</a> instance. </td></tr>
    <tr><td class="paramname">Configure</td><td>is a pointer to the XZDma_ChDataConfig structure which has all the configuration fields. The fields of the structure are:<ul>
<li>OverFetch - Allows over fetch or not<ul>
<li>0 - Not allowed to over-fetch on SRC</li>
<li>1 - Allowed to over-fetch on SRC</li>
</ul>
</li>
<li>SrcIssue - Outstanding transaction on SRC<ul>
<li>Range is 1 to 32</li>
</ul>
</li>
<li>SrcBurstType - Burst Type for SRC AXI transaction<ul>
<li>XZDMA_FIXED_BURST - Fixed burst</li>
<li>XZDMA_INCR_BURST - Incremental burst</li>
</ul>
</li>
<li>SrcBurstLen - AXI Length for Data Read.<ul>
<li>Range of values is (1,2,4,8,16).</li>
</ul>
</li>
<li>DstBurstType - Burst Type for SRC AXI transaction<ul>
<li>XZDMA_FIXED_BURST - Fixed burst</li>
<li>XZDMA_INCR_BURST - Incremental burst</li>
</ul>
</li>
<li>DstBurstLen - AXI Length for Data write.<ul>
<li>Range of values is (1,2,4,8,16).</li>
</ul>
</li>
<li>SrcCache - AXI cache bits for Data read</li>
<li>SrcQos - Configurable QoS bits for AXI Data read</li>
<li>DstCache - AXI cache bits for Data write</li>
<li>DstQos - configurable QoS bits for AXI Data write</li>
</ul>
</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_FAILURE If ZDMA Core is not in Idle state and</li>
<li>XST_SUCCESS If Configurations are made successfully</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd><ul>
<li>These configurations will last till we modify or Reset by <a class="el" href="group__zdma.html#gaf236c2323636d87ab0888b2d6f55a313" title="This function resets the ZDMA core. ">XZDma_Reset(XZDma *InstancePtr)</a>.</li>
<li>Configurations should be modified only when ZDMA channel is IDLE this can be confirmed by using <a class="el" href="group__zdma.html#gabbb337d990f31dc8932356f5abeb78bf" title="This function returns the state of ZDMA core. ">XZDma_ChannelState(XZDma *InstancePtr)</a> API. </li>
</ul>
</dd></dl>

<p>References <a class="el" href="struct_x_z_dma___config.html#a9be2f556ef1ee02397fb358f06aa5366">XZDma_Config::BaseAddress</a>, <a class="el" href="struct_x_z_dma.html#ae7cb358dd89da5287751442fd9a7fb53">XZDma::ChannelState</a>, <a class="el" href="struct_x_z_dma.html#a16d3eccbc976f6b61c7b83ac0df68f89">XZDma::Config</a>, <a class="el" href="struct_x_z_dma.html#ace8acb1e903931b38a9f6393cfca5f51">XZDma::DataConfig</a>, <a class="el" href="struct_x_z_dma___data_config.html#a7510617151cb03fbefdc1ae1701e0263">XZDma_DataConfig::DstBurstLen</a>, <a class="el" href="struct_x_z_dma___data_config.html#a539b42c423c5275626455a5ec02b9b86">XZDma_DataConfig::DstBurstType</a>, <a class="el" href="struct_x_z_dma___data_config.html#af222d9922f6197ac0cd076e9c7dbc31a">XZDma_DataConfig::DstCache</a>, <a class="el" href="struct_x_z_dma___data_config.html#a40c90389c27c6d94de05e39e5cee64e7">XZDma_DataConfig::DstQos</a>, <a class="el" href="struct_x_z_dma___data_config.html#af6657e43d38da393e1676477d81449b7">XZDma_DataConfig::OverFetch</a>, <a class="el" href="struct_x_z_dma___data_config.html#a3c1367c6570b09c6fb40b870f07fd792">XZDma_DataConfig::SrcBurstLen</a>, <a class="el" href="struct_x_z_dma___data_config.html#a946a5d7a1367df277236f3aa5941ac02">XZDma_DataConfig::SrcBurstType</a>, <a class="el" href="struct_x_z_dma___data_config.html#aad59bcf9b6125e7b663e4c824a0d5349">XZDma_DataConfig::SrcCache</a>, <a class="el" href="struct_x_z_dma___data_config.html#a5072d085f2cbdc54f1e12f943dc2ee14">XZDma_DataConfig::SrcIssue</a>, <a class="el" href="struct_x_z_dma___data_config.html#ac5dc5f4360b7b593e3e946ad05af5e8f">XZDma_DataConfig::SrcQos</a>, <a class="el" href="group__zdma.html#gac02824ee188615e27684eaea248c33eb">XZDMA_CTRL0_OVR_FETCH_MASK</a>, <a class="el" href="group__zdma.html#ga076b5d95f700c212f10016db79d3099a">XZDMA_CTRL0_OVR_FETCH_SHIFT</a>, <a class="el" href="group__zdma.html#ga4771477b0ae47b43caa80ce62cd5da26">XZDMA_CTRL1_SRC_ISSUE_MASK</a>, <a class="el" href="group__zdma.html#gaa881506ca78408d01653104a4250ab0c">XZDMA_DATA_ATTR_ARBURST_MASK</a>, <a class="el" href="group__zdma.html#gaefa353e6b08ee707e01d99d1c45be931">XZDMA_DATA_ATTR_ARBURST_SHIFT</a>, <a class="el" href="group__zdma.html#ga1c99701981861114d5e4d470728b4fbe">XZDMA_DATA_ATTR_ARCACHE_MASK</a>, <a class="el" href="group__zdma.html#ga3fe36e16ad31159f99a640e9c3bb6568">XZDMA_DATA_ATTR_ARCACHE_SHIFT</a>, <a class="el" href="group__zdma.html#ga07bd79ddfdc6aae7c165b7650f84256c">XZDMA_DATA_ATTR_ARLEN_MASK</a>, <a class="el" href="group__zdma.html#gad57774673e1e4297dada019e7a1351a0">XZDMA_DATA_ATTR_ARLEN_SHIFT</a>, <a class="el" href="group__zdma.html#ga38b5f7ce878bbea9db766a8a7b2c315b">XZDMA_DATA_ATTR_ARQOS_MASK</a>, <a class="el" href="group__zdma.html#gaf3d3eac7b0b5139637930e1d58775d2b">XZDMA_DATA_ATTR_ARQOS_SHIFT</a>, <a class="el" href="group__zdma.html#gacd98a78505f4b50ccf9bcee2cf4d4217">XZDMA_DATA_ATTR_AWBURST_MASK</a>, <a class="el" href="group__zdma.html#ga7002622e4bf8c047681ebe4b0efdedc7">XZDMA_DATA_ATTR_AWBURST_SHIFT</a>, <a class="el" href="group__zdma.html#ga4dea58f251b7ccea5ea60374edec3c7d">XZDMA_DATA_ATTR_AWCACHE_MASK</a>, <a class="el" href="group__zdma.html#ga0320f84e12d6075b163f5adf415496fc">XZDMA_DATA_ATTR_AWCACHE_SHIFT</a>, <a class="el" href="group__zdma.html#ga89ab3c509042ce8ddd0fec5c83a8bc8b">XZDMA_DATA_ATTR_AWLEN_MASK</a>, <a class="el" href="group__zdma.html#gaa7a54821c20e9a7e23252a5ec971c5bd">XZDMA_DATA_ATTR_AWQOS_MASK</a>, <a class="el" href="group__zdma.html#gab5a55d0a765874f387e853cfebaa48a7">XZDMA_DATA_ATTR_AWQOS_SHIFT</a>, <a class="el" href="xzdma_8h.html#a19f8494063d56f2f39f9d40e6ded952aa598386ffccc9121fe927b5d761e0d07b">XZDMA_IDLE</a>, <a class="el" href="group__zdma.html#gaf3bdd7a21f9d6add3ec23802122a7a85">XZDma_ReadReg</a>, and <a class="el" href="group__zdma.html#ga1fe52ea6cc149bd35296d497837eff5b">XZDma_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xzdma__linear__example_8c.html#a4d3f40edf2d265f5df9a045f27ba5ff5">XZDma_LinearExample()</a>, <a class="el" href="xzdma__linkedlist__example_8c.html#a4760deea4e054235c55a504187d96988">XZDma_LinkedListExample()</a>, <a class="el" href="xzdma__simple__example_8c.html#a378c4f0e9236ec692d7f32d7fe4220e7">XZDma_SimpleExample()</a>, <a class="el" href="xzdma__readonlymode__example_8c.html#a422668353271c6d61d0b749f6f7cd048">XZDma_SimpleReadOnlyExample()</a>, and <a class="el" href="xzdma__writeonlymode__example_8c.html#a18349b17c717df9dd089f5e9a3b465b9">XZDma_WriteOnlyExample()</a>.</p>

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          <td class="memname">s32 XZDma_SetChDscrConfig </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_z_dma.html">XZDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_z_dma___dscr_config.html">XZDma_DscrConfig</a> *&#160;</td>
          <td class="paramname"><em>Configure</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function sets the descriptor attributes based on the inputs provided in the structure. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_z_dma.html" title="The XZDma driver instance data structure. ">XZDma</a> instance. </td></tr>
    <tr><td class="paramname">Configure</td><td>is a pointer to the XZDma_ChDscrConfig structure which has all the configuration fields. The fields of the structure are:<ul>
<li>AxCoherent - AXI transactions generated for the descriptor.<ul>
<li>0 - Non coherent</li>
<li>1 - Coherent</li>
</ul>
</li>
<li>AXCache - AXI cache bit used for DSCR fetch (both on SRC and DST Side)</li>
<li>AXQos - QoS bit used for DSCR fetch (both on SRC and DST Side)</li>
</ul>
</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_FAILURE If ZDMA core is not in Idle state and<ul>
<li>XST_SUCCESS If Configurations are made successfully</li>
</ul>
</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_z_dma___dscr_config.html#ad38367e530b5b2331cb1d487e41f11a8">XZDma_DscrConfig::AXCache</a>, <a class="el" href="struct_x_z_dma___dscr_config.html#abf4ec728c1ad271759ed0b4ecc82caae">XZDma_DscrConfig::AxCoherent</a>, <a class="el" href="struct_x_z_dma___dscr_config.html#af63f7a189b00292faa23b6d11c7a3903">XZDma_DscrConfig::AXQos</a>, <a class="el" href="struct_x_z_dma___config.html#a9be2f556ef1ee02397fb358f06aa5366">XZDma_Config::BaseAddress</a>, <a class="el" href="struct_x_z_dma.html#ae7cb358dd89da5287751442fd9a7fb53">XZDma::ChannelState</a>, <a class="el" href="struct_x_z_dma.html#a16d3eccbc976f6b61c7b83ac0df68f89">XZDma::Config</a>, <a class="el" href="struct_x_z_dma.html#a7c98e315d4533b69b0add5bbf21e2954">XZDma::DscrConfig</a>, <a class="el" href="group__zdma.html#gabc067f3d88ea147d23f49168fc3f7de6">XZDMA_DSCR_ATTR_AXCACHE_MASK</a>, <a class="el" href="group__zdma.html#ga6cae905057544443789c744ace6b7700">XZDMA_DSCR_ATTR_AXCACHE_SHIFT</a>, <a class="el" href="group__zdma.html#ga0c761d93384a2590517648a21792a938">XZDMA_DSCR_ATTR_AXCOHRNT_MASK</a>, <a class="el" href="group__zdma.html#gacf85276abd3537f849cb9279861570a4">XZDMA_DSCR_ATTR_AXCOHRNT_SHIFT</a>, <a class="el" href="group__zdma.html#gab1f6da6a358a3f6c721b9fccabc6b4d1">XZDMA_DSCR_ATTR_AXQOS_MASK</a>, <a class="el" href="xzdma_8h.html#a19f8494063d56f2f39f9d40e6ded952aa598386ffccc9121fe927b5d761e0d07b">XZDMA_IDLE</a>, and <a class="el" href="group__zdma.html#ga1fe52ea6cc149bd35296d497837eff5b">XZDma_WriteReg</a>.</p>

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          <td class="memname">s32 XZDma_SetMode </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_z_dma.html">XZDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
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          <td class="paramkey"></td>
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          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>IsSgDma</em>, </td>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="xzdma_8h.html#a84e5ba98d56dac2078e4bc68d5b5ab92">XZDma_Mode</a>&#160;</td>
          <td class="paramname"><em>Mode</em>&#160;</td>
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<p>This function sets the pointer type and mode in which ZDMA needs to transfer the data. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_z_dma.html" title="The XZDma driver instance data structure. ">XZDma</a> instance. </td></tr>
    <tr><td class="paramname">IsSgDma</td><td>is a variable which specifies whether transfer has to to be done in scatter gather mode or simple mode.<ul>
<li>TRUE - Scatter gather pointer type</li>
<li>FALSE - Simple pointer type </li>
</ul>
</td></tr>
    <tr><td class="paramname">Mode</td><td>is the type of the mode in which data has to be initiated<ul>
<li>XZDMA_NORMAL_MODE - Normal data transfer from source to destination (Valid for both Scatter gather and simple types)</li>
<li>XZDMA_WRONLY_MODE - Write only mode (Valid only for Simple)</li>
<li>XZDMA_RDONLY_MODE - Read only mode (Valid only for Simple)</li>
</ul>
</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS - If mode has been set successfully.</li>
<li>XST_FAILURE - If mode has not been set.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>Mode cannot be changed while ZDMA is not in IDLE state. </dd></dl>

<p>References <a class="el" href="struct_x_z_dma___config.html#a9be2f556ef1ee02397fb358f06aa5366">XZDma_Config::BaseAddress</a>, <a class="el" href="struct_x_z_dma.html#ae7cb358dd89da5287751442fd9a7fb53">XZDma::ChannelState</a>, <a class="el" href="struct_x_z_dma.html#a16d3eccbc976f6b61c7b83ac0df68f89">XZDma::Config</a>, <a class="el" href="struct_x_z_dma.html#a1e4b5934b1b40ebc10ed5969bbc27c30">XZDma::IsSgDma</a>, <a class="el" href="struct_x_z_dma.html#a6ce36be06f13ecb70ac666bb3819e394">XZDma::Mode</a>, <a class="el" href="group__zdma.html#gaec1a986d8168e84618d9513a2c56541b">XZDMA_CTRL0_MODE_MASK</a>, <a class="el" href="group__zdma.html#gaadd46eb8217527c9907eced132dd50e1">XZDMA_CTRL0_POINT_TYPE_MASK</a>, <a class="el" href="group__zdma.html#ga4bb41a2cbf283dbbfdba7f9bc1f5bac3">XZDMA_CTRL0_RDONLY_MASK</a>, <a class="el" href="group__zdma.html#ga1fc161baf17e0a6ba73942b50e0b2880">XZDMA_CTRL0_WRONLY_MASK</a>, <a class="el" href="xzdma_8h.html#a19f8494063d56f2f39f9d40e6ded952aa598386ffccc9121fe927b5d761e0d07b">XZDMA_IDLE</a>, <a class="el" href="xzdma_8h.html#a84e5ba98d56dac2078e4bc68d5b5ab92acfd0a78e43b38febc3d4985a8b62efa5">XZDMA_NORMAL_MODE</a>, <a class="el" href="xzdma_8h.html#a84e5ba98d56dac2078e4bc68d5b5ab92ae1f570b5830d33f5969892bfe72da8e1">XZDMA_RDONLY_MODE</a>, <a class="el" href="group__zdma.html#gaf3bdd7a21f9d6add3ec23802122a7a85">XZDma_ReadReg</a>, <a class="el" href="group__zdma.html#ga1fe52ea6cc149bd35296d497837eff5b">XZDma_WriteReg</a>, and <a class="el" href="xzdma_8h.html#a84e5ba98d56dac2078e4bc68d5b5ab92adef85a4c2d7f8c93dd77aa8156be25bd">XZDMA_WRONLY_MODE</a>.</p>

<p>Referenced by <a class="el" href="xzdma__linear__example_8c.html#a4d3f40edf2d265f5df9a045f27ba5ff5">XZDma_LinearExample()</a>, <a class="el" href="xzdma__linkedlist__example_8c.html#a4760deea4e054235c55a504187d96988">XZDma_LinkedListExample()</a>, <a class="el" href="xzdma__simple__example_8c.html#a378c4f0e9236ec692d7f32d7fe4220e7">XZDma_SimpleExample()</a>, <a class="el" href="xzdma__readonlymode__example_8c.html#a422668353271c6d61d0b749f6f7cd048">XZDma_SimpleReadOnlyExample()</a>, and <a class="el" href="xzdma__writeonlymode__example_8c.html#a18349b17c717df9dd089f5e9a3b465b9">XZDma_WriteOnlyExample()</a>.</p>

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          <td class="memname">s32 XZDma_Start </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_z_dma.html">XZDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_z_dma___transfer.html">XZDma_Transfer</a> *&#160;</td>
          <td class="paramname"><em>Data</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Num</em>&#160;</td>
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        <tr>
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<p>This function sets all the required fields for initiating data transfer. </p>
<p>Data transfer elements needs to be passed through structure pointer. Data transfer can be done in any of the three modes (simple, Linear or Linked List) based on the selected mode but before calling this API make sure that ZDMA is in Idle state.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_z_dma.html" title="The XZDma driver instance data structure. ">XZDma</a> instance. </td></tr>
    <tr><td class="paramname">Data</td><td>is a pointer of array to the <a class="el" href="struct_x_z_dma___transfer.html" title="This typedef contains the fields for transfer of data. ">XZDma_Transfer</a> structure which has all the configuration fields for initiating data transfer. The fields of the structure are:<ul>
<li>SrcAddr - Source address</li>
<li>DstAddr - Destination address</li>
<li>Size - size of the data to be transferred in bytes</li>
<li>SrcCoherent - AXI transactions generated to process the descriptor payload for source channel<ul>
<li>0 - Non coherent</li>
<li>1 - Coherent</li>
</ul>
</li>
<li>DstCoherent - AXI transactions generated to process the descriptor payload for destination channel<ul>
<li>0 - Non coherent</li>
<li>1 - Coherent</li>
</ul>
</li>
<li>Pause - Valid only for scatter gather mode. Will pause after completion of this descriptor. </li>
</ul>
</td></tr>
    <tr><td class="paramname">Num</td><td>specifies number of array elements of Data pointer.<ul>
<li>For simple mode Num should be equal to 1</li>
<li>For Scatter gather mode (either linear or linked list) Num can be any choice. (But based on which memory should be allocated by Application) It should be less than the return value of XZDma_CreateBDList.</li>
</ul>
</td></tr>
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  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS - if ZDMA initiated the transfer.</li>
<li>XST_FAILURE - if ZDMA has not initiated data transfer.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>After Pause to resume the transfer need to use the following API<ul>
<li>XZDma_Resume User should provide allocated memory and descriptor type in scatter gather mode through the following API before calling the start API.</li>
<li>XZDma_SetDescriptorType(<a class="el" href="struct_x_z_dma.html" title="The XZDma driver instance data structure. ">XZDma</a> *InstancePtr, XZDma_DscrType TypeOfDscr, UINTPTR Dscr_MemPtr, u32 NoOfBytes) </li>
</ul>
</dd></dl>

<p>References <a class="el" href="struct_x_z_dma.html#ae7cb358dd89da5287751442fd9a7fb53">XZDma::ChannelState</a>, <a class="el" href="struct_x_z_dma.html#a5bd448e43cadd065021bfe03ec8bcd4b">XZDma::Descriptor</a>, <a class="el" href="struct_x_z_dma___descriptor.html#a79a3a960fa2f970881929a7fe8e3c6e6">XZDma_Descriptor::DscrCount</a>, <a class="el" href="struct_x_z_dma.html#a1e4b5934b1b40ebc10ed5969bbc27c30">XZDma::IsSgDma</a>, <a class="el" href="xzdma_8h.html#a19f8494063d56f2f39f9d40e6ded952aac7f53a5b63f7f73793a60c5213c695df">XZDMA_BUSY</a>, <a class="el" href="group__zdma.html#ga34c98a505b24c6e549ed7f746a82676e">XZDma_Enable()</a>, and <a class="el" href="group__zdma.html#ga4e1c01839429d264c285bc7488b42fb8">XZDma_ScatterGather()</a>.</p>

<p>Referenced by <a class="el" href="xzdma__linear__example_8c.html#a4d3f40edf2d265f5df9a045f27ba5ff5">XZDma_LinearExample()</a>, <a class="el" href="xzdma__linkedlist__example_8c.html#a4760deea4e054235c55a504187d96988">XZDma_LinkedListExample()</a>, <a class="el" href="xzdma__simple__example_8c.html#a378c4f0e9236ec692d7f32d7fe4220e7">XZDma_SimpleExample()</a>, <a class="el" href="xzdma__readonlymode__example_8c.html#a422668353271c6d61d0b749f6f7cd048">XZDma_SimpleReadOnlyExample()</a>, and <a class="el" href="xzdma__writeonlymode__example_8c.html#a18349b17c717df9dd089f5e9a3b465b9">XZDma_WriteOnlyExample()</a>.</p>

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          <td class="memname">void XZDma_WOData </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_z_dma.html">XZDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
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          <td class="paramtype">u32 *&#160;</td>
          <td class="paramname"><em>Buffer</em>&#160;</td>
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<p>This function preloads the buffers which will be used in write only mode. </p>
<p>In write only mode the data in the provided buffer will be written in destination address for specified size.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_z_dma.html" title="The XZDma driver instance data structure. ">XZDma</a> instance. </td></tr>
    <tr><td class="paramname">Buffer</td><td>is a pointer to an array of 64/128 bit data. i.e. pointer to 32 bit array of size 2/4<ul>
<li>Array of Size 2 for ADMA</li>
<li>Array of Size 4 for GDMA</li>
</ul>
</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>Valid only in simple mode. Prior to call this function ZDMA instance should be set in Write only mode by using XZDma_SetMode(<a class="el" href="struct_x_z_dma.html" title="The XZDma driver instance data structure. ">XZDma</a> *InstancePtr, u8 IsSgDma, XZDma_Mode Mode) To initiate data transfer after this API need to call <a class="el" href="group__zdma.html#ga70f7466e97aae2126181727774f6e6bb" title="This function sets all the required fields for initiating data transfer. ">XZDma_Start(XZDma *InstancePtr, XZDma_Transfer *Data, u32 Num)</a> In which only destination fields has to be filled. </dd></dl>

<p>References <a class="el" href="struct_x_z_dma___config.html#a9be2f556ef1ee02397fb358f06aa5366">XZDma_Config::BaseAddress</a>, <a class="el" href="struct_x_z_dma.html#a16d3eccbc976f6b61c7b83ac0df68f89">XZDma::Config</a>, <a class="el" href="struct_x_z_dma___config.html#aaa2e5e405c0903647be81cb68f2f3542">XZDma_Config::DmaType</a>, and <a class="el" href="group__zdma.html#ga1fe52ea6cc149bd35296d497837eff5b">XZDma_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xzdma__writeonlymode__example_8c.html#a18349b17c717df9dd089f5e9a3b465b9">XZDma_WriteOnlyExample()</a>.</p>

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